Lines Matching +full:psci +full:- +full:suspend +full:- +full:param
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/thermal/thermal.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
33 #address-cells = <1>;
34 #size-cells = <0>;
37 * We expect the enable-method for cpu's to be "psci", but this
40 * Currently supported enable-method is psci v0.2
44 compatible = "arm,cortex-a53";
47 next-level-cache = <&l2>;
48 cpu-idle-states = <&CPU_PH20>;
49 #cooling-cells = <2>;
54 compatible = "arm,cortex-a53";
57 next-level-cache = <&l2>;
58 cpu-idle-states = <&CPU_PH20>;
59 #cooling-cells = <2>;
64 compatible = "arm,cortex-a53";
67 next-level-cache = <&l2>;
68 cpu-idle-states = <&CPU_PH20>;
69 #cooling-cells = <2>;
74 compatible = "arm,cortex-a53";
77 next-level-cache = <&l2>;
78 cpu-idle-states = <&CPU_PH20>;
79 #cooling-cells = <2>;
82 l2: l2-cache {
87 idle-states {
89 * PSCI node is not added default, U-boot will add missing
90 * parts if it determines to use PSCI.
92 entry-method = "psci";
94 CPU_PH20: cpu-ph20 {
95 compatible = "arm,idle-state";
96 idle-state-name = "PH20";
97 arm,psci-suspend-param = <0x0>;
98 entry-latency-us = <1000>;
99 exit-latency-us = <1000>;
100 min-residency-us = <3000>;
110 reserved-memory {
111 #address-cells = <2>;
112 #size-cells = <2>;
115 bman_fbpr: bman-fbpr {
116 compatible = "shared-dma-pool";
119 no-map;
122 qman_fqd: qman-fqd {
123 compatible = "shared-dma-pool";
126 no-map;
129 qman_pfdr: qman-pfdr {
130 compatible = "shared-dma-pool";
133 no-map;
138 compatible = "fixed-clock";
139 #clock-cells = <0>;
140 clock-frequency = <100000000>;
141 clock-output-names = "sysclk";
145 compatible ="syscon-reboot";
151 thermal-zones {
152 cpu_thermal: cpu-thermal {
153 polling-delay-passive = <1000>;
154 polling-delay = <5000>;
156 thermal-sensors = <&tmu 3>;
159 cpu_alert: cpu-alert {
164 cpu_crit: cpu-crit {
171 cooling-maps {
174 cooling-device =
185 compatible = "arm,armv8-timer";
187 <1 14 0xf08>, /* Physical Non-Secure PPI */
190 fsl,erratum-a008585;
194 compatible = "arm,armv8-pmuv3";
199 interrupt-affinity = <&cpu0>,
205 gic: interrupt-controller@1400000 {
206 compatible = "arm,gic-400";
207 #interrupt-cells = <3>;
208 interrupt-controller;
217 compatible = "simple-bus";
218 #address-cells = <2>;
219 #size-cells = <2>;
223 compatible = "fsl,ls1043a-clockgen";
225 #clock-cells = <2>;
230 compatible = "fsl,ls1043a-scfg", "syscon";
232 big-endian;
236 compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
237 "fsl,sec-v4.0";
238 fsl,sec-era = <3>;
239 #address-cells = <1>;
240 #size-cells = <1>;
246 compatible = "fsl,sec-v5.4-job-ring",
247 "fsl,sec-v5.0-job-ring",
248 "fsl,sec-v4.0-job-ring";
254 compatible = "fsl,sec-v5.4-job-ring",
255 "fsl,sec-v5.0-job-ring",
256 "fsl,sec-v4.0-job-ring";
262 compatible = "fsl,sec-v5.4-job-ring",
263 "fsl,sec-v5.0-job-ring",
264 "fsl,sec-v4.0-job-ring";
270 compatible = "fsl,sec-v5.4-job-ring",
271 "fsl,sec-v5.0-job-ring",
272 "fsl,sec-v4.0-job-ring";
279 compatible = "fsl,ls1043a-dcfg", "syscon";
281 big-endian;
285 compatible = "fsl,ifc", "simple-bus";
291 compatible = "fsl,ls1043a-qspi", "fsl,ls1021a-qspi";
292 #address-cells = <1>;
293 #size-cells = <0>;
296 reg-names = "QuadSPI", "QuadSPI-memory";
298 clock-names = "qspi_en", "qspi";
304 compatible = "fsl,ls1043a-esdhc", "fsl,esdhc";
307 clock-frequency = <0>;
308 voltage-ranges = <1800 1800 3300 3300>;
309 sdhci,auto-cmd12;
310 big-endian;
311 bus-width = <4>;
314 ddr: memory-controller@1080000 {
315 compatible = "fsl,qoriq-memory-controller";
318 big-endian;
322 compatible = "fsl,qoriq-tmu";
325 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
326 fsl,tmu-calibration = <0x00000000 0x00000026
362 #thermal-sensor-cells = <1>;
369 memory-region = <&qman_fqd &qman_pfdr>;
376 memory-region = <&bman_fbpr>;
379 bportals: bman-portals@508000000 {
383 qportals: qman-portals@500000000 {
388 compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
389 #address-cells = <1>;
390 #size-cells = <0>;
393 clock-names = "dspi";
395 spi-num-chipselects = <5>;
396 big-endian;
401 compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
402 #address-cells = <1>;
403 #size-cells = <0>;
406 clock-names = "dspi";
408 spi-num-chipselects = <5>;
409 big-endian;
414 compatible = "fsl,vf610-i2c";
415 #address-cells = <1>;
416 #size-cells = <0>;
419 clock-names = "i2c";
423 dma-names = "tx", "rx";
428 compatible = "fsl,vf610-i2c";
429 #address-cells = <1>;
430 #size-cells = <0>;
433 clock-names = "i2c";
439 compatible = "fsl,vf610-i2c";
440 #address-cells = <1>;
441 #size-cells = <0>;
444 clock-names = "i2c";
450 compatible = "fsl,vf610-i2c";
451 #address-cells = <1>;
452 #size-cells = <0>;
455 clock-names = "i2c";
489 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
492 gpio-controller;
493 #gpio-cells = <2>;
494 interrupt-controller;
495 #interrupt-cells = <2>;
499 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
502 gpio-controller;
503 #gpio-cells = <2>;
504 interrupt-controller;
505 #interrupt-cells = <2>;
509 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
512 gpio-controller;
513 #gpio-cells = <2>;
514 interrupt-controller;
515 #interrupt-cells = <2>;
519 compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
522 gpio-controller;
523 #gpio-cells = <2>;
524 interrupt-controller;
525 #interrupt-cells = <2>;
529 compatible = "fsl,ls1021a-lpuart";
533 clock-names = "ipg";
538 compatible = "fsl,ls1021a-lpuart";
542 clock-names = "ipg";
547 compatible = "fsl,ls1021a-lpuart";
551 clock-names = "ipg";
556 compatible = "fsl,ls1021a-lpuart";
560 clock-names = "ipg";
565 compatible = "fsl,ls1021a-lpuart";
569 clock-names = "ipg";
574 compatible = "fsl,ls1021a-lpuart";
578 clock-names = "ipg";
583 compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
587 clock-names = "wdog";
588 big-endian;
592 #dma-cells = <2>;
593 compatible = "fsl,vf610-edma";
599 interrupt-names = "edma-tx", "edma-err";
600 dma-channels = <32>;
601 big-endian;
602 clock-names = "dmamux0", "dmamux1";
612 snps,quirk-frame-length-adjustment = <0x20>;
614 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
622 snps,quirk-frame-length-adjustment = <0x20>;
624 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
632 snps,quirk-frame-length-adjustment = <0x20>;
634 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
638 compatible = "fsl,ls1043a-ahci";
641 reg-names = "ahci", "sata-ecc";
644 dma-coherent;
647 msi1: msi-controller1@1571000 {
648 compatible = "fsl,ls1043a-msi";
650 msi-controller;
654 msi2: msi-controller2@1572000 {
655 compatible = "fsl,ls1043a-msi";
657 msi-controller;
661 msi3: msi-controller3@1573000 {
662 compatible = "fsl,ls1043a-msi";
664 msi-controller;
669 compatible = "fsl,ls1043a-pcie";
672 reg-names = "regs", "config";
675 interrupt-names = "intr", "pme";
676 #address-cells = <3>;
677 #size-cells = <2>;
679 dma-coherent;
680 num-viewport = <6>;
681 bus-range = <0x0 0xff>;
683 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
684 msi-parent = <&msi1>, <&msi2>, <&msi3>;
685 #interrupt-cells = <1>;
686 interrupt-map-mask = <0 0 0 7>;
687 interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
695 compatible = "fsl,ls1043a-pcie";
698 reg-names = "regs", "config";
701 interrupt-names = "intr", "pme";
702 #address-cells = <3>;
703 #size-cells = <2>;
705 dma-coherent;
706 num-viewport = <6>;
707 bus-range = <0x0 0xff>;
709 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
710 msi-parent = <&msi1>, <&msi2>, <&msi3>;
711 #interrupt-cells = <1>;
712 interrupt-map-mask = <0 0 0 7>;
713 interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
721 compatible = "fsl,ls1043a-pcie";
724 reg-names = "regs", "config";
727 interrupt-names = "intr", "pme";
728 #address-cells = <3>;
729 #size-cells = <2>;
731 dma-coherent;
732 num-viewport = <6>;
733 bus-range = <0x0 0xff>;
735 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
736 msi-parent = <&msi1>, <&msi2>, <&msi3>;
737 #interrupt-cells = <1>;
738 interrupt-map-mask = <0 0 0 7>;
739 interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
746 qdma: dma-controller@8380000 {
747 compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
756 interrupt-names = "qdma-error", "qdma-queue0",
757 "qdma-queue1", "qdma-queue2", "qdma-queue3";
758 dma-channels = <8>;
759 block-number = <1>;
760 block-offset = <0x10000>;
761 fsl,dma-queues = <2>;
762 status-sizes = <64>;
763 queue-sizes = <64 64>;
764 big-endian;
771 compatible = "linaro,optee-tz";
778 #include "qoriq-qman-portals.dtsi"
779 #include "qoriq-bman-portals.dtsi"