Lines Matching +full:psci +full:- +full:suspend +full:- +full:param
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
21 #address-cells = <1>;
22 #size-cells = <0>;
26 compatible = "arm,cortex-a72";
28 enable-method = "psci";
30 next-level-cache = <&l2>;
31 cpu-idle-states = <&CPU_PW20>;
32 #cooling-cells = <2>;
37 compatible = "arm,cortex-a72";
39 enable-method = "psci";
41 next-level-cache = <&l2>;
42 cpu-idle-states = <&CPU_PW20>;
43 #cooling-cells = <2>;
46 l2: l2-cache {
51 idle-states {
53 * PSCI node is not added default, U-boot will add missing
54 * parts if it determines to use PSCI.
56 entry-method = "arm,psci";
58 CPU_PW20: cpu-pw20 {
59 compatible = "arm,idle-state";
60 idle-state-name = "PW20";
61 arm,psci-suspend-param = <0x0>;
62 entry-latency-us = <2000>;
63 exit-latency-us = <2000>;
64 min-residency-us = <6000>;
68 sysclk: clock-sysclk {
69 compatible = "fixed-clock";
70 #clock-cells = <0>;
71 clock-frequency = <100000000>;
72 clock-output-names = "sysclk";
75 osc_27m: clock-osc-27m {
76 compatible = "fixed-clock";
77 #clock-cells = <0>;
78 clock-frequency = <27000000>;
79 clock-output-names = "phy_27m";
82 dpclk: clock-controller@f1f0000 {
83 compatible = "fsl,ls1028a-plldig";
85 #clock-cells = <1>;
89 aclk: clock-axi {
90 compatible = "fixed-clock";
91 #clock-cells = <0>;
92 clock-frequency = <650000000>;
93 clock-output-names= "aclk";
96 pclk: clock-apb {
97 compatible = "fixed-clock";
98 #clock-cells = <0>;
99 clock-frequency = <650000000>;
100 clock-output-names= "pclk";
104 compatible ="syscon-reboot";
111 compatible = "arm,armv8-timer";
123 compatible = "arm,cortex-a72-pmu";
127 gic: interrupt-controller@6000000 {
128 compatible= "arm,gic-v3";
129 #address-cells = <2>;
130 #size-cells = <2>;
134 #interrupt-cells= <3>;
135 interrupt-controller;
138 its: gic-its@6020000 {
139 compatible = "arm,gic-v3-its";
140 msi-controller;
146 compatible = "simple-bus";
147 #address-cells = <2>;
148 #size-cells = <2>;
151 ddr: memory-controller@1080000 {
152 compatible = "fsl,qoriq-memory-controller";
155 big-endian;
159 compatible = "fsl,ls1028a-dcfg", "syscon";
161 big-endian;
165 compatible = "fsl,ls1028a-scfg", "syscon";
167 big-endian;
170 clockgen: clock-controller@1300000 {
171 compatible = "fsl,ls1028a-clockgen";
173 #clock-cells = <2>;
178 compatible = "fsl,vf610-i2c";
179 #address-cells = <1>;
180 #size-cells = <0>;
188 compatible = "fsl,vf610-i2c";
189 #address-cells = <1>;
190 #size-cells = <0>;
198 compatible = "fsl,vf610-i2c";
199 #address-cells = <1>;
200 #size-cells = <0>;
208 compatible = "fsl,vf610-i2c";
209 #address-cells = <1>;
210 #size-cells = <0>;
218 compatible = "fsl,vf610-i2c";
219 #address-cells = <1>;
220 #size-cells = <0>;
228 compatible = "fsl,vf610-i2c";
229 #address-cells = <1>;
230 #size-cells = <0>;
238 compatible = "fsl,vf610-i2c";
239 #address-cells = <1>;
240 #size-cells = <0>;
248 compatible = "fsl,vf610-i2c";
249 #address-cells = <1>;
250 #size-cells = <0>;
258 compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
261 clock-frequency = <0>; /* fixed up by bootloader */
263 voltage-ranges = <1800 1800 3300 3300>;
264 sdhci,auto-cmd12;
265 little-endian;
266 bus-width = <4>;
271 compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
274 clock-frequency = <0>; /* fixed up by bootloader */
276 voltage-ranges = <1800 1800 3300 3300>;
277 sdhci,auto-cmd12;
278 broken-cd;
279 little-endian;
280 bus-width = <4>;
300 edma0: dma-controller@22c0000 {
301 #dma-cells = <2>;
302 compatible = "fsl,vf610-edma";
308 interrupt-names = "edma-tx", "edma-err";
309 dma-channels = <32>;
310 clock-names = "dmamux0", "dmamux1";
316 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
319 gpio-controller;
320 #gpio-cells = <2>;
321 interrupt-controller;
322 #interrupt-cells = <2>;
323 little-endian;
327 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
330 gpio-controller;
331 #gpio-cells = <2>;
332 interrupt-controller;
333 #interrupt-cells = <2>;
334 little-endian;
338 compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
341 gpio-controller;
342 #gpio-cells = <2>;
343 interrupt-controller;
344 #interrupt-cells = <2>;
345 little-endian;
349 compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
354 snps,quirk-frame-length-adjustment = <0x20>;
355 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
359 compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
364 snps,quirk-frame-length-adjustment = <0x20>;
365 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
369 compatible = "fsl,ls1028a-ahci";
372 reg-names = "ahci", "sata-ecc";
379 compatible = "arm,mmu-500";
381 #global-interrupts = <8>;
382 #iommu-cells = <1>;
383 stream-match-mask = <0x7c00>;
388 /* global non-secure fault */
390 /* combined non-secure interrupt */
392 /* performance counter interrupts 0-7 */
431 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
432 fsl,sec-era = <10>;
433 #address-cells = <1>;
434 #size-cells = <1>;
438 dma-coherent;
441 compatible = "fsl,sec-v5.0-job-ring",
442 "fsl,sec-v4.0-job-ring";
448 compatible = "fsl,sec-v5.0-job-ring",
449 "fsl,sec-v4.0-job-ring";
455 compatible = "fsl,sec-v5.0-job-ring",
456 "fsl,sec-v4.0-job-ring";
462 compatible = "fsl,sec-v5.0-job-ring",
463 "fsl,sec-v4.0-job-ring";
469 qdma: dma-controller@8380000 {
470 compatible = "fsl,ls1028a-qdma", "fsl,ls1021a-qdma";
479 interrupt-names = "qdma-error", "qdma-queue0",
480 "qdma-queue1", "qdma-queue2", "qdma-queue3";
481 dma-channels = <8>;
482 block-number = <1>;
483 block-offset = <0x10000>;
484 fsl,dma-queues = <2>;
485 status-sizes = <64>;
486 queue-sizes = <64 64>;
493 clock-names = "apb_pclk", "wdog_clk";
500 clock-names = "apb_pclk", "wdog_clk";
503 sai1: audio-controller@f100000 {
504 #sound-dai-cells = <0>;
505 compatible = "fsl,vf610-sai";
510 clock-names = "bus", "mclk1", "mclk2", "mclk3";
511 dma-names = "tx", "rx";
517 sai2: audio-controller@f110000 {
518 #sound-dai-cells = <0>;
519 compatible = "fsl,vf610-sai";
524 clock-names = "bus", "mclk1", "mclk2", "mclk3";
525 dma-names = "tx", "rx";
531 sai4: audio-controller@f130000 {
532 #sound-dai-cells = <0>;
533 compatible = "fsl,vf610-sai";
538 clock-names = "bus", "mclk1", "mclk2", "mclk3";
539 dma-names = "tx", "rx";
546 compatible = "fsl,qoriq-tmu";
549 fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
550 fsl,tmu-calibration = <0x00000000 0x00000024
593 little-endian;
594 #thermal-sensor-cells = <1>;
597 thermal-zones {
598 core-cluster {
599 polling-delay-passive = <1000>;
600 polling-delay = <5000>;
601 thermal-sensors = <&tmu 0>;
604 core_cluster_alert: core-cluster-alert {
610 core_cluster_crit: core-cluster-crit {
617 cooling-maps {
620 cooling-device =
629 compatible = "pci-host-ecam-generic";
631 #address-cells = <3>;
632 #size-cells = <2>;
633 #interrupt-cells = <1>;
634 msi-parent = <&its>;
636 bus-range = <0x0 0x0>;
637 dma-coherent;
638 msi-map = <0 &its 0x17 0xe>;
639 iommu-map = <0 &smmu 0x17 0xe>;
640 /* PF0-6 BAR0 - non-prefetchable memory */
642 /* PF0-6 BAR2 - prefetchable memory */
644 /* PF0: VF0-1 BAR0 - non-prefetchable memory */
646 /* PF0: VF0-1 BAR2 - prefetchable memory */
648 /* PF1: VF0-1 BAR0 - non-prefetchable memory */
650 /* PF1: VF0-1 BAR2 - prefetchable memory */
662 compatible = "fsl,enetc-mdio";
664 #address-cells = <1>;
665 #size-cells = <0>;
668 compatible = "fsl,enetc-ptp";
671 little-endian;
677 compatible = "arm,mali-dp500";
681 interrupt-names = "DE", "SE";
683 clock-names = "pxlclk", "mclk", "aclk", "pclk";
684 arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
685 arm,malidp-arqos-value = <0xd000d000>;