Lines Matching +full:psci +full:- +full:suspend +full:- +full:param
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1012A family SoC.
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
20 rtic-a = &rtic_a;
21 rtic-b = &rtic_b;
22 rtic-c = &rtic_c;
23 rtic-d = &rtic_d;
24 sec-mon = &sec_mon;
28 #address-cells = <1>;
29 #size-cells = <0>;
33 compatible = "arm,cortex-a53";
36 #cooling-cells = <2>;
37 cpu-idle-states = <&CPU_PH20>;
41 idle-states {
43 * PSCI node is not added default, U-boot will add missing
44 * parts if it determines to use PSCI.
46 entry-method = "psci";
48 CPU_PH20: cpu-ph20 {
49 compatible = "arm,idle-state";
50 idle-state-name = "PH20";
51 arm,psci-suspend-param = <0x0>;
52 entry-latency-us = <1000>;
53 exit-latency-us = <1000>;
54 min-residency-us = <3000>;
59 compatible = "fixed-clock";
60 #clock-cells = <0>;
61 clock-frequency = <125000000>;
62 clock-output-names = "sysclk";
66 compatible = "fixed-clock";
67 #clock-cells = <0>;
68 clock-frequency = <100000000>;
69 clock-output-names = "coreclk";
73 compatible = "arm,armv8-timer";
75 <1 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */
81 compatible = "arm,armv8-pmuv3";
85 gic: interrupt-controller@1400000 {
86 compatible = "arm,gic-400";
87 #interrupt-cells = <3>;
88 interrupt-controller;
97 compatible = "syscon-reboot";
103 thermal-zones {
104 cpu_thermal: cpu-thermal {
105 polling-delay-passive = <1000>;
106 polling-delay = <5000>;
107 thermal-sensors = <&tmu 0>;
110 cpu_alert: cpu-alert {
116 cpu_crit: cpu-crit {
123 cooling-maps {
126 cooling-device =
135 compatible = "simple-bus";
136 #address-cells = <2>;
137 #size-cells = <2>;
141 compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
145 voltage-ranges = <1800 1800 3300 3300>;
146 sdhci,auto-cmd12;
147 big-endian;
148 bus-width = <4>;
153 compatible = "fsl,ls1012a-scfg", "syscon";
155 big-endian;
159 compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
163 voltage-ranges = <1800 1800 3300 3300>;
164 sdhci,auto-cmd12;
165 big-endian;
166 broken-cd;
167 bus-width = <4>;
172 compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
173 "fsl,sec-v4.0";
174 fsl,sec-era = <8>;
175 #address-cells = <1>;
176 #size-cells = <1>;
182 compatible = "fsl,sec-v5.4-job-ring",
183 "fsl,sec-v5.0-job-ring",
184 "fsl,sec-v4.0-job-ring";
190 compatible = "fsl,sec-v5.4-job-ring",
191 "fsl,sec-v5.0-job-ring",
192 "fsl,sec-v4.0-job-ring";
198 compatible = "fsl,sec-v5.4-job-ring",
199 "fsl,sec-v5.0-job-ring",
200 "fsl,sec-v4.0-job-ring";
206 compatible = "fsl,sec-v5.4-job-ring",
207 "fsl,sec-v5.0-job-ring",
208 "fsl,sec-v4.0-job-ring";
214 compatible = "fsl,sec-v5.4-rtic",
215 "fsl,sec-v5.0-rtic",
216 "fsl,sec-v4.0-rtic";
217 #address-cells = <1>;
218 #size-cells = <1>;
222 rtic_a: rtic-a@0 {
223 compatible = "fsl,sec-v5.4-rtic-memory",
224 "fsl,sec-v5.0-rtic-memory",
225 "fsl,sec-v4.0-rtic-memory";
229 rtic_b: rtic-b@20 {
230 compatible = "fsl,sec-v5.4-rtic-memory",
231 "fsl,sec-v5.0-rtic-memory",
232 "fsl,sec-v4.0-rtic-memory";
236 rtic_c: rtic-c@40 {
237 compatible = "fsl,sec-v5.4-rtic-memory",
238 "fsl,sec-v5.0-rtic-memory",
239 "fsl,sec-v4.0-rtic-memory";
243 rtic_d: rtic-d@60 {
244 compatible = "fsl,sec-v5.4-rtic-memory",
245 "fsl,sec-v5.0-rtic-memory",
246 "fsl,sec-v4.0-rtic-memory";
253 compatible = "fsl,sec-v5.4-mon", "fsl,sec-v5.0-mon",
254 "fsl,sec-v4.0-mon";
261 compatible = "fsl,ls1012a-dcfg",
264 big-endian;
268 compatible = "fsl,ls1012a-clockgen";
270 #clock-cells = <2>;
272 clock-names = "sysclk", "coreclk";
276 compatible = "fsl,qoriq-tmu";
279 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
280 fsl,tmu-calibration = <0x00000000 0x00000026
316 big-endian;
317 #thermal-sensor-cells = <1>;
321 compatible = "fsl,vf610-i2c";
322 #address-cells = <1>;
323 #size-cells = <0>;
331 compatible = "fsl,vf610-i2c";
332 #address-cells = <1>;
333 #size-cells = <0>;
341 compatible = "fsl,ls1012a-dspi", "fsl,ls1021a-v1.0-dspi";
342 #address-cells = <1>;
343 #size-cells = <0>;
346 clock-names = "dspi";
348 spi-num-chipselects = <5>;
349 big-endian;
370 compatible = "fsl,qoriq-gpio";
373 gpio-controller;
374 #gpio-cells = <2>;
375 interrupt-controller;
376 #interrupt-cells = <2>;
380 compatible = "fsl,qoriq-gpio";
383 gpio-controller;
384 #gpio-cells = <2>;
385 interrupt-controller;
386 #interrupt-cells = <2>;
390 compatible = "fsl,ls1012a-wdt",
391 "fsl,imx21-wdt";
395 big-endian;
399 #sound-dai-cells = <0>;
400 compatible = "fsl,vf610-sai";
405 clock-names = "bus", "mclk1", "mclk2", "mclk3";
406 dma-names = "tx", "rx";
413 #sound-dai-cells = <0>;
414 compatible = "fsl,vf610-sai";
419 clock-names = "bus", "mclk1", "mclk2", "mclk3";
420 dma-names = "tx", "rx";
427 #dma-cells = <2>;
428 compatible = "fsl,vf610-edma";
434 interrupt-names = "edma-tx", "edma-err";
435 dma-channels = <32>;
436 big-endian;
437 clock-names = "dmamux0", "dmamux1";
447 snps,quirk-frame-length-adjustment = <0x20>;
449 snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
453 compatible = "fsl,ls1012a-ahci", "fsl,ls1043a-ahci";
456 reg-names = "ahci", "sata-ecc";
459 dma-coherent;
464 compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
471 msi: msi-controller1@1572000 {
472 compatible = "fsl,ls1012a-msi";
474 msi-controller;
479 compatible = "fsl,ls1012a-pcie";
482 reg-names = "regs", "config";
485 interrupt-names = "aer", "pme";
486 #address-cells = <3>;
487 #size-cells = <2>;
489 num-viewport = <2>;
490 bus-range = <0x0 0xff>;
492 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
493 msi-parent = <&msi>;
494 #interrupt-cells = <1>;
495 interrupt-map-mask = <0 0 0 7>;
496 interrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
506 compatible = "linaro,optee-tz";