Lines Matching +full:clock +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/exynos7-clk.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <1>;
16 #size-cells = <1>;
31 arm-pmu {
32 compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3";
37 interrupt-affinity = <&cpu_atlas0>, <&cpu_atlas1>,
41 fin_pll: clock {
43 compatible = "fixed-clock";
44 clock-output-names = "fin_pll";
45 #clock-cells = <0>;
49 #address-cells = <1>;
50 #size-cells = <0>;
54 compatible = "arm,cortex-a57";
56 enable-method = "psci";
61 compatible = "arm,cortex-a57";
63 enable-method = "psci";
68 compatible = "arm,cortex-a57";
70 enable-method = "psci";
75 compatible = "arm,cortex-a57";
77 enable-method = "psci";
82 compatible = "samsung,exynos5433-mali", "arm,mali-t760";
87 interrupt-names = "job", "mmu", "gpu";
93 compatible = "arm,psci-0.2";
98 compatible = "simple-bus";
99 #address-cells = <1>;
100 #size-cells = <1>;
104 compatible = "samsung,exynos4210-chipid";
108 gic: interrupt-controller@11001000 {
109 compatible = "arm,gic-400";
110 #interrupt-cells = <3>;
111 #address-cells = <0>;
112 interrupt-controller;
120 compatible = "simple-bus";
121 #address-cells = <1>;
122 #size-cells = <1>;
130 clock-names = "apb_pclk";
131 #dma-cells = <1>;
132 #dma-channels = <8>;
133 #dma-requests = <32>;
141 clock-names = "apb_pclk";
142 #dma-cells = <1>;
143 #dma-channels = <8>;
144 #dma-requests = <32>;
148 clock_topc: clock-controller@10570000 {
149 compatible = "samsung,exynos7-clock-topc";
151 #clock-cells = <1>;
154 clock_top0: clock-controller@105d0000 {
155 compatible = "samsung,exynos7-clock-top0";
157 #clock-cells = <1>;
162 clock-names = "fin_pll", "dout_sclk_bus0_pll",
167 clock_top1: clock-controller@105e0000 {
168 compatible = "samsung,exynos7-clock-top1";
170 #clock-cells = <1>;
175 clock-names = "fin_pll", "dout_sclk_bus0_pll",
180 clock_ccore: clock-controller@105b0000 {
181 compatible = "samsung,exynos7-clock-ccore";
183 #clock-cells = <1>;
185 clock-names = "fin_pll", "dout_aclk_ccore_133";
188 clock_peric0: clock-controller@13610000 {
189 compatible = "samsung,exynos7-clock-peric0";
191 #clock-cells = <1>;
194 clock-names = "fin_pll", "dout_aclk_peric0_66",
198 clock_peric1: clock-controller@14c80000 {
199 compatible = "samsung,exynos7-clock-peric1";
201 #clock-cells = <1>;
206 clock-names = "fin_pll", "dout_aclk_peric1_66",
210 clock_peris: clock-controller@10040000 {
211 compatible = "samsung,exynos7-clock-peris";
213 #clock-cells = <1>;
215 clock-names = "fin_pll", "dout_aclk_peris_66";
218 clock_fsys0: clock-controller@10e90000 {
219 compatible = "samsung,exynos7-clock-fsys0";
221 #clock-cells = <1>;
224 clock-names = "fin_pll", "dout_aclk_fsys0_200",
228 clock_fsys1: clock-controller@156e0000 {
229 compatible = "samsung,exynos7-clock-fsys1";
231 #clock-cells = <1>;
235 clock-names = "fin_pll", "dout_aclk_fsys1_200",
240 compatible = "samsung,exynos4210-uart";
245 clock-names = "uart", "clk_uart_baud0";
250 compatible = "samsung,exynos4210-uart";
255 clock-names = "uart", "clk_uart_baud0";
260 compatible = "samsung,exynos4210-uart";
265 clock-names = "uart", "clk_uart_baud0";
270 compatible = "samsung,exynos4210-uart";
275 clock-names = "uart", "clk_uart_baud0";
280 compatible = "samsung,exynos7-pinctrl";
283 wakeup-interrupt-controller {
284 compatible = "samsung,exynos7-wakeup-eint";
285 interrupt-parent = <&gic>;
291 compatible = "samsung,exynos7-pinctrl";
297 compatible = "samsung,exynos7-pinctrl";
303 compatible = "samsung,exynos7-pinctrl";
309 compatible = "samsung,exynos7-pinctrl";
315 compatible = "samsung,exynos7-pinctrl";
321 compatible = "samsung,exynos7-pinctrl";
327 compatible = "samsung,exynos7-pinctrl";
333 compatible = "samsung,exynos7-pinctrl";
339 compatible = "samsung,exynos7-hsi2c";
342 #address-cells = <1>;
343 #size-cells = <0>;
344 pinctrl-names = "default";
345 pinctrl-0 = <&hs_i2c0_bus>;
347 clock-names = "hsi2c";
352 compatible = "samsung,exynos7-hsi2c";
355 #address-cells = <1>;
356 #size-cells = <0>;
357 pinctrl-names = "default";
358 pinctrl-0 = <&hs_i2c1_bus>;
360 clock-names = "hsi2c";
365 compatible = "samsung,exynos7-hsi2c";
368 #address-cells = <1>;
369 #size-cells = <0>;
370 pinctrl-names = "default";
371 pinctrl-0 = <&hs_i2c2_bus>;
373 clock-names = "hsi2c";
378 compatible = "samsung,exynos7-hsi2c";
381 #address-cells = <1>;
382 #size-cells = <0>;
383 pinctrl-names = "default";
384 pinctrl-0 = <&hs_i2c3_bus>;
386 clock-names = "hsi2c";
391 compatible = "samsung,exynos7-hsi2c";
394 #address-cells = <1>;
395 #size-cells = <0>;
396 pinctrl-names = "default";
397 pinctrl-0 = <&hs_i2c4_bus>;
399 clock-names = "hsi2c";
404 compatible = "samsung,exynos7-hsi2c";
407 #address-cells = <1>;
408 #size-cells = <0>;
409 pinctrl-names = "default";
410 pinctrl-0 = <&hs_i2c5_bus>;
412 clock-names = "hsi2c";
417 compatible = "samsung,exynos7-hsi2c";
420 #address-cells = <1>;
421 #size-cells = <0>;
422 pinctrl-names = "default";
423 pinctrl-0 = <&hs_i2c6_bus>;
425 clock-names = "hsi2c";
430 compatible = "samsung,exynos7-hsi2c";
433 #address-cells = <1>;
434 #size-cells = <0>;
435 pinctrl-names = "default";
436 pinctrl-0 = <&hs_i2c7_bus>;
438 clock-names = "hsi2c";
443 compatible = "samsung,exynos7-hsi2c";
446 #address-cells = <1>;
447 #size-cells = <0>;
448 pinctrl-names = "default";
449 pinctrl-0 = <&hs_i2c8_bus>;
451 clock-names = "hsi2c";
456 compatible = "samsung,exynos7-hsi2c";
459 #address-cells = <1>;
460 #size-cells = <0>;
461 pinctrl-names = "default";
462 pinctrl-0 = <&hs_i2c9_bus>;
464 clock-names = "hsi2c";
469 compatible = "samsung,exynos7-hsi2c";
472 #address-cells = <1>;
473 #size-cells = <0>;
474 pinctrl-names = "default";
475 pinctrl-0 = <&hs_i2c10_bus>;
477 clock-names = "hsi2c";
482 compatible = "samsung,exynos7-hsi2c";
485 #address-cells = <1>;
486 #size-cells = <0>;
487 pinctrl-names = "default";
488 pinctrl-0 = <&hs_i2c11_bus>;
490 clock-names = "hsi2c";
494 pmu_system_controller: system-controller@105c0000 {
495 compatible = "samsung,exynos7-pmu", "syscon";
498 reboot: syscon-reboot {
499 compatible = "syscon-reboot";
507 compatible = "samsung,s3c6410-rtc";
512 clock-names = "rtc";
517 compatible = "samsung,exynos7-wdt";
521 clock-names = "watchdog";
522 samsung,syscon-phandle = <&pmu_system_controller>;
527 compatible = "samsung,exynos7-dw-mshc-smu";
529 #address-cells = <1>;
530 #size-cells = <0>;
534 clock-names = "biu", "ciu";
535 fifo-depth = <0x40>;
540 compatible = "samsung,exynos7-dw-mshc";
542 #address-cells = <1>;
543 #size-cells = <0>;
547 clock-names = "biu", "ciu";
548 fifo-depth = <0x40>;
553 compatible = "samsung,exynos7-dw-mshc-smu";
555 #address-cells = <1>;
556 #size-cells = <0>;
560 clock-names = "biu", "ciu";
561 fifo-depth = <0x40>;
566 compatible = "samsung,exynos7-adc";
570 clock-names = "adc";
571 #io-channel-cells = <1>;
572 io-channel-ranges;
577 compatible = "samsung,exynos4210-pwm";
579 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
580 #pwm-cells = <3>;
582 clock-names = "timers";
586 compatible = "samsung,exynos7-tmu";
591 clock-names = "tmu_apbif", "tmu_sclk";
592 #thermal-sensor-cells = <0>;
595 thermal-zones {
596 atlas_thermal: cluster0-thermal {
597 polling-delay-passive = <0>; /* milliseconds */
598 polling-delay = <0>; /* milliseconds */
599 thermal-sensors = <&tmuctrl_0>;
600 #include "exynos7-trip-points.dtsi"
605 compatible = "samsung,exynos7-usbdrd-phy";
612 clock-names = "phy", "ref", "phy_pipe",
614 samsung,pmu-syscon = <&pmu_system_controller>;
615 #phy-cells = <1>;
619 compatible = "samsung,exynos7-dwusb3";
623 clock-names = "usbdrd30", "usbdrd30_susp_clk",
625 #address-cells = <1>;
626 #size-cells = <1>;
634 phy-names = "usb2-phy", "usb3-phy";
640 compatible = "arm,armv8-timer";
652 #include "exynos7-pinctrl.dtsi"