Lines Matching +full:reset +full:- +full:names
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-gx.dtsi"
8 #include <dt-bindings/clock/gxbb-clkc.h>
9 #include <dt-bindings/clock/gxbb-aoclkc.h>
10 #include <dt-bindings/gpio/meson-gxl-gpio.h>
11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
14 compatible = "amlogic,meson-gxl";
19 compatible = "amlogic,meson-gxl-dwc3";
20 #address-cells = <2>;
21 #size-cells = <2>;
25 clock-names = "usb_general";
26 resets = <&reset RESET_USB_OTG>;
27 reset-names = "usb_otg";
34 maximum-speed = "high-speed";
44 compatible = "amlogic,meson-gxl-usb2-phy";
45 #phy-cells = <0>;
48 clock-names = "phy";
49 resets = <&reset RESET_USB_OTG>;
50 reset-names = "phy";
55 compatible = "amlogic,meson-gxl-usb2-phy";
56 #phy-cells = <0>;
59 clock-names = "phy";
60 resets = <&reset RESET_USB_OTG>;
61 reset-names = "phy";
66 compatible = "amlogic,meson-gxl-usb3-phy";
67 #phy-cells = <0>;
71 clock-names = "phy", "peripheral";
72 resets = <&reset RESET_USB_OTG>, <&reset RESET_USB_OTG>;
73 reset-names = "phy", "peripheral";
86 clock-names = "stmmaceth", "clkin0", "clkin1";
89 #address-cells = <1>;
90 #size-cells = <0>;
91 compatible = "snps,dwmac-mdio";
97 compatible = "amlogic,meson-gxl-aobus-pinctrl";
98 #address-cells = <2>;
99 #size-cells = <2>;
106 reg-names = "mux", "pull", "gpio";
107 gpio-controller;
108 #gpio-cells = <2>;
109 gpio-ranges = <&pinctrl_aobus 0 0 14>;
116 bias-disable;
125 bias-disable;
133 bias-disable;
141 bias-disable;
150 bias-disable;
158 bias-disable;
167 bias-disable;
175 bias-disable;
183 bias-disable;
191 bias-disable;
199 bias-disable;
207 bias-disable;
215 bias-disable;
223 bias-disable;
231 bias-disable;
239 bias-disable;
247 bias-disable;
255 clock-names = "core";
259 compatible = "amlogic,meson-gxl-aoclkc", "amlogic,meson-gx-aoclkc";
261 clock-names = "xtal", "mpeg-clk";
265 compatible = "amlogic,meson-gpio-intc",
266 "amlogic,meson-gxl-gpio-intc";
271 compatible = "amlogic,meson-gxl-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
272 resets = <&reset RESET_HDMITX_CAPB3>,
273 <&reset RESET_HDMI_SYSTEM_RESET>,
274 <&reset RESET_HDMI_TX>;
275 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
279 clock-names = "isfr", "iahb", "venci";
283 clkc: clock-controller {
284 compatible = "amlogic,gxl-clkc";
285 #clock-cells = <1>;
287 clock-names = "xtal";
309 compatible = "amlogic,meson-gxl-periphs-pinctrl";
310 #address-cells = <2>;
311 #size-cells = <2>;
319 reg-names = "mux", "pull", "pull-enable", "gpio";
320 gpio-controller;
321 #gpio-cells = <2>;
322 gpio-ranges = <&pinctrl_periphs 0 0 100>;
326 mux-0 {
330 bias-pull-up;
333 mux-1 {
336 bias-disable;
340 emmc_ds_pins: emmc-ds {
344 bias-pull-down;
352 bias-pull-down;
363 bias-disable;
367 spi_pins: spi-pins {
373 bias-disable;
377 spi_ss0_pins: spi-ss0 {
381 bias-disable;
386 mux-0 {
393 bias-pull-up;
396 mux-1 {
399 bias-disable;
407 bias-pull-down;
412 mux-0 {
419 bias-pull-up;
422 mux-1 {
425 bias-disable;
433 bias-pull-down;
441 bias-disable;
450 bias-disable;
459 bias-disable;
468 bias-disable;
477 bias-disable;
486 bias-disable;
495 bias-disable;
504 bias-disable;
513 bias-disable;
522 bias-disable;
543 bias-disable;
551 bias-disable;
566 bias-disable;
574 bias-disable;
582 bias-disable;
590 bias-disable;
598 bias-disable;
606 bias-disable;
614 bias-disable;
622 bias-disable;
630 bias-disable;
638 bias-disable;
646 bias-disable;
654 bias-disable;
662 bias-disable;
669 bias-disable;
677 bias-disable;
685 bias-disable;
693 bias-disable;
698 eth-phy-mux {
699 compatible = "mdio-mux-mmioreg", "mdio-mux";
700 #address-cells = <1>;
701 #size-cells = <0>;
703 mux-mask = <0xffffffff>;
704 mdio-parent-bus = <&mdio0>;
708 #address-cells = <1>;
709 #size-cells = <0>;
711 internal_phy: ethernet-phy@8 {
712 compatible = "ethernet-phy-id0181.4400";
715 max-speed = <100>;
721 #address-cells = <1>;
722 #size-cells = <0>;
728 resets = <&reset RESET_VIU>,
729 <&reset RESET_VENC>,
730 <&reset RESET_VCBUS>,
731 <&reset RESET_BT656>,
732 <&reset RESET_DVIN_RESET>,
733 <&reset RESET_RDMA>,
734 <&reset RESET_VENCI>,
735 <&reset RESET_VENCP>,
736 <&reset RESET_VDAC>,
737 <&reset RESET_VDI6>,
738 <&reset RESET_VENCL>,
739 <&reset RESET_VID_LOCK>;
742 clock-names = "vpu", "vapb";
749 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
755 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
761 assigned-clock-rates = <0>, /* Do Nothing */
770 compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
775 clock-names = "clkin", "core", "adc_clk", "adc_sel";
782 clock-names = "core", "clkin0", "clkin1";
783 resets = <&reset RESET_SD_EMMC_A>;
790 clock-names = "core", "clkin0", "clkin1";
791 resets = <&reset RESET_SD_EMMC_B>;
798 clock-names = "core", "clkin0", "clkin1";
799 resets = <&reset RESET_SD_EMMC_C>;
810 clock-names = "core";
811 resets = <&reset RESET_PERIPHS_SPICC>;
812 num-cs = <1>;
821 clock-names = "xtal", "pclk", "baud";
826 clock-names = "xtal", "pclk", "baud";
831 clock-names = "xtal", "pclk", "baud";
836 clock-names = "xtal", "pclk", "baud";
841 clock-names = "xtal", "pclk", "baud";
845 compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
846 power-domains = <&pwrc_vpu>;
850 compatible = "amlogic,gxl-vdec", "amlogic,gx-vdec";
855 clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc";
856 resets = <&reset RESET_PARSER>;
857 reset-names = "esparser";