Lines Matching +full:reset +full:- +full:names
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "meson-gx.dtsi"
7 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
8 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
9 #include <dt-bindings/clock/gxbb-clkc.h>
10 #include <dt-bindings/clock/gxbb-aoclkc.h>
11 #include <dt-bindings/reset/gxbb-aoclkc.h>
14 compatible = "amlogic,meson-gxbb";
18 compatible = "amlogic,meson-gxbb-usb2-phy";
19 #phy-cells = <0>;
21 resets = <&reset RESET_USB_OTG>;
23 clock-names = "usb_general", "usb";
28 compatible = "amlogic,meson-gxbb-usb2-phy";
29 #phy-cells = <0>;
31 resets = <&reset RESET_USB_OTG>;
33 clock-names = "usb_general", "usb";
38 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
42 clock-names = "otg";
44 phy-names = "usb2-phy";
50 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
54 clock-names = "otg";
56 phy-names = "usb2-phy";
65 compatible = "amlogic,meson-gxbb-aobus-pinctrl";
66 #address-cells = <2>;
67 #size-cells = <2>;
74 reg-names = "mux", "pull", "gpio";
75 gpio-controller;
76 #gpio-cells = <2>;
77 gpio-ranges = <&pinctrl_aobus 0 0 14>;
84 bias-disable;
93 bias-disable;
101 bias-disable;
110 bias-disable;
118 bias-disable;
127 bias-disable;
135 bias-disable;
143 bias-disable;
151 bias-disable;
159 bias-disable;
167 bias-disable;
175 bias-disable;
183 bias-disable;
191 bias-disable;
199 bias-disable;
207 bias-disable;
222 bias-disable;
230 bias-disable;
238 bias-disable;
246 compatible = "amlogic,meson-gxbb-mali", "arm,mali-450";
258 interrupt-names = "gp", "gpmmu", "pp", "pmu",
262 clock-names = "bus", "core";
269 assigned-clocks = <&clkc CLKID_GP0_PLL>,
273 assigned-clock-parents = <0>, /* Do Nothing */
277 assigned-clock-rates = <744000000>,
286 compatible = "amlogic,meson-gxbb-spifc";
288 #address-cells = <1>;
289 #size-cells = <0>;
297 clock-names = "core";
301 compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc";
303 clock-names = "xtal", "mpeg-clk";
314 clock-names = "stmmaceth", "clkin0", "clkin1";
318 compatible = "amlogic,meson-gpio-intc",
319 "amlogic,meson-gxbb-gpio-intc";
324 compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
325 resets = <&reset RESET_HDMITX_CAPB3>,
326 <&reset RESET_HDMI_SYSTEM_RESET>,
327 <&reset RESET_HDMI_TX>;
328 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
332 clock-names = "isfr", "iahb", "venci";
336 clkc: clock-controller {
337 compatible = "amlogic,gxbb-clkc";
338 #clock-cells = <1>;
340 clock-names = "xtal";
346 clock-names = "core";
367 compatible = "amlogic,meson-gxbb-periphs-pinctrl";
368 #address-cells = <2>;
369 #size-cells = <2>;
377 reg-names = "mux", "pull", "pull-enable", "gpio";
378 gpio-controller;
379 #gpio-cells = <2>;
380 gpio-ranges = <&pinctrl_periphs 0 0 119>;
384 mux-0 {
388 bias-pull-up;
391 mux-1 {
394 bias-disable;
398 emmc_ds_pins: emmc-ds {
402 bias-pull-down;
410 bias-pull-down;
421 bias-disable;
425 spi_pins: spi-pins {
431 bias-disable;
435 spi_ss0_pins: spi-ss0 {
439 bias-disable;
444 mux-0 {
451 bias-pull-up;
454 mux-1 {
457 bias-disable;
465 bias-pull-down;
470 mux-0 {
477 bias-pull-up;
480 mux-1 {
483 bias-disable;
491 bias-pull-down;
499 bias-disable;
508 bias-disable;
517 bias-disable;
526 bias-disable;
535 bias-disable;
544 bias-disable;
553 bias-disable;
562 bias-disable;
571 bias-disable;
580 bias-disable;
584 eth_rgmii_pins: eth-rgmii {
601 bias-disable;
605 eth_rmii_pins: eth-rmii {
617 bias-disable;
625 bias-disable;
633 bias-disable;
641 bias-disable;
649 bias-disable;
657 bias-disable;
665 bias-disable;
673 bias-disable;
681 bias-disable;
689 bias-disable;
697 bias-disable;
705 bias-disable;
713 bias-disable;
721 bias-disable;
728 resets = <&reset RESET_VIU>,
729 <&reset RESET_VENC>,
730 <&reset RESET_VCBUS>,
731 <&reset RESET_BT656>,
732 <&reset RESET_DVIN_RESET>,
733 <&reset RESET_RDMA>,
734 <&reset RESET_VENCI>,
735 <&reset RESET_VENCP>,
736 <&reset RESET_VDAC>,
737 <&reset RESET_VDI6>,
738 <&reset RESET_VENCL>,
739 <&reset RESET_VID_LOCK>;
742 clock-names = "vpu", "vapb";
749 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
755 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
761 assigned-clock-rates = <0>, /* Do Nothing */
770 compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc";
775 clock-names = "clkin", "core", "adc_clk", "adc_sel";
782 clock-names = "core", "clkin0", "clkin1";
783 resets = <&reset RESET_SD_EMMC_A>;
790 clock-names = "core", "clkin0", "clkin1";
791 resets = <&reset RESET_SD_EMMC_B>;
798 clock-names = "core", "clkin0", "clkin1";
799 resets = <&reset RESET_SD_EMMC_C>;
810 clock-names = "core";
811 resets = <&reset RESET_PERIPHS_SPICC>;
812 num-cs = <1>;
821 clock-names = "xtal", "pclk", "baud";
826 clock-names = "xtal", "pclk", "baud";
831 clock-names = "xtal", "pclk", "baud";
836 clock-names = "xtal", "pclk", "baud";
841 clock-names = "xtal", "pclk", "baud";
845 compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
846 power-domains = <&pwrc_vpu>;
850 compatible = "amlogic,gxbb-vdec", "amlogic,gx-vdec";
855 clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc";
856 resets = <&reset RESET_PARSER>;
857 reset-names = "esparser";