Lines Matching refs:workaround

338 	  The workaround promotes data cache clean instructions to
340 	  Please note that this does not necessarily enable the workaround,
360 	  The workaround promotes data cache clean instructions to
362 	  Please note that this does not necessarily enable the workaround,
383 	  The workaround promotes data cache clean instructions to
386 	  workaround, as it depends on the alternative framework, which will
405 	  The workaround promotes data cache clean instructions to
407 	  Please note that this does not necessarily enable the workaround,
423 	  The workaround is to promote device loads to use Load-Acquire
425 	  Please note that this does not necessarily enable the workaround,
444 	  The workaround is to verify that the Stage 1 translation
446 	  Please note that this does not necessarily enable the workaround,
465 	  The workaround is to write the contextidr_el1 register on exception
467 	  Please note that this does not necessarily enable the workaround,
489 	  This option adds a workaround for ARM Cortex-A55 Erratum 1024718.
493 	  without a break-before-make. The workaround is to disable the usage
504 	  This option adds a workaround for ARM Cortex-A76/Neoverse-N1
517 	  This option adds a workaround for ARM Cortex-A76 erratum 1165522.
530 	  This option adds a workaround for ARM Cortex-A76 erratum 1286807.
539 	  workaround repeats the TLBI+DSB operation.
547 	  This option adds a workaround for Arm Cortex-A76 erratum 1463225.
565 	  Enable workaround for errata 22375 and 24313.
704 	  This option adds a workaround for Fujitsu-A64FX erratum E#010001.
714 	  The workaround is to ensure these bits are clear in TCR_ELx.
715 	  The workaround only affects the Fujitsu-A64FX.
1496 	  Specific errata workaround(s) might also force module PLTs to be