208 	ccr = p->dma_read(CCR, lch);  in omap_set_dma_priority()
224 	l = p->dma_read(CSDP, lch);  in omap_set_dma_transfer_params()
232 		ccr = p->dma_read(CCR, lch);  in omap_set_dma_transfer_params()
238 		ccr = p->dma_read(CCR2, lch);  in omap_set_dma_transfer_params()
248 		val = p->dma_read(CCR, lch);  in omap_set_dma_transfer_params()
286 		csdp = p->dma_read(CSDP, lch);  in omap_set_dma_write_mode()
299 		l = p->dma_read(LCH_CTRL, lch);  in omap_set_dma_channel_mode()
317 		w = p->dma_read(CSDP, lch);  in omap_set_dma_src_params()
323 	l = p->dma_read(CCR, lch);  in omap_set_dma_src_params()
358 	l = p->dma_read(CSDP, lch);  in omap_set_dma_src_data_pack()
371 	l = p->dma_read(CSDP, lch);  in omap_set_dma_src_burst_mode()
417 		l = p->dma_read(CSDP, lch);  in omap_set_dma_dest_params()
423 	l = p->dma_read(CCR, lch);  in omap_set_dma_dest_params()
439 	l = p->dma_read(CSDP, lch);  in omap_set_dma_dest_data_pack()
452 	l = p->dma_read(CSDP, lch);  in omap_set_dma_dest_burst_mode()
491 		p->dma_read(CSR, lch);  in omap_enable_channel_irq()
505 		p->dma_read(CSR, lch);  in omap_disable_channel_irq()
526 	l = p->dma_read(CLNK_CTRL, lch);  in enable_lnk()
548 	l = p->dma_read(CLNK_CTRL, lch);  in disable_lnk()
579 	val = p->dma_read(IRQENABLE_L0, lch);  in omap2_enable_irq_lch()
595 	val = p->dma_read(IRQENABLE_L0, lch);  in omap2_disable_irq_lch()
766 	l = p->dma_read(CCR, lch);  in omap_dma_set_prio_lch()
835 	l = p->dma_read(CCR, lch);  in omap_start_dma()
861 	l = p->dma_read(CCR, lch);  in omap_stop_dma()
868 		l = p->dma_read(OCP_SYSCONFIG, lch);  in omap_stop_dma()
874 		l = p->dma_read(CCR, lch);  in omap_stop_dma()
879 		l = p->dma_read(CCR, lch);  in omap_stop_dma()
884 			l = p->dma_read(CCR, lch);  in omap_stop_dma()
965 		offset = p->dma_read(CPC, lch);  in omap_get_dma_src_pos()
967 		offset = p->dma_read(CSAC, lch);  in omap_get_dma_src_pos()
970 		offset = p->dma_read(CSAC, lch);  in omap_get_dma_src_pos()
978 		if (likely(p->dma_read(CDAC, lch)))  in omap_get_dma_src_pos()
979 			offset = p->dma_read(CSAC, lch);  in omap_get_dma_src_pos()
981 			offset = p->dma_read(CSSA, lch);  in omap_get_dma_src_pos()
985 		offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000);  in omap_get_dma_src_pos()
1004 		offset = p->dma_read(CPC, lch);  in omap_get_dma_dst_pos()
1006 		offset = p->dma_read(CDAC, lch);  in omap_get_dma_dst_pos()
1013 		offset = p->dma_read(CDAC, lch);  in omap_get_dma_dst_pos()
1020 			offset = p->dma_read(CDSA, lch);  in omap_get_dma_dst_pos()
1024 		offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000);  in omap_get_dma_dst_pos()
1032 	return (p->dma_read(CCR, lch) & OMAP_DMA_CCR_EN) != 0;  in omap_get_dma_active_status()
1045 		if (p->dma_read(CCR, lch) & OMAP_DMA_CCR_EN)  in omap_dma_running()
1060 			p->dma_write(p->dma_read(CCR, lch_head) | (3 << 8),  in omap_dma_link_lch()
1091 		csr = p->dma_read(CSR, ch);  in omap1_dma_handle_ch()
1143 	u32 status = p->dma_read(CSR, ch);  in omap2_dma_handle_ch()
1166 			ccr = p->dma_read(CCR, ch);  in omap2_dma_handle_ch()
1182 	p->dma_read(IRQSTATUS_L0, ch);  in omap2_dma_handle_ch()
1188 		if (p->dma_read(CLNK_CTRL, ch) & (1 << 15))  in omap2_dma_handle_ch()
1198 		status = p->dma_read(CSR, ch);  in omap2_dma_handle_ch()
1214 	val = p->dma_read(IRQSTATUS_L0, 0);  in omap2_dma_irq_handler()
1220 	enable_reg = p->dma_read(IRQENABLE_L0, 0);  in omap2_dma_irq_handler()
1250 		p->dma_read(IRQENABLE_L0, 0);  in omap_dma_global_context_save()
1252 		p->dma_read(IRQENABLE_L1, 0);  in omap_dma_global_context_save()
1254 		p->dma_read(OCP_SYSCONFIG, 0);  in omap_dma_global_context_save()
1255 	omap_dma_global_context.dma_gcr = p->dma_read(GCR, 0);  in omap_dma_global_context_save()