Lines Matching refs:PWRSTS_OFF_RET
38 [0] = PWRSTS_OFF_RET, /* core_nret_bank */
39 [1] = PWRSTS_OFF_RET, /* core_ocmram */
40 [2] = PWRSTS_OFF_RET, /* core_other_bank */
41 [3] = PWRSTS_OFF_RET, /* ipu_l2ram */
42 [4] = PWRSTS_OFF_RET, /* ipu_unicache */
45 [0] = PWRSTS_OFF_RET, /* core_nret_bank */
46 [1] = PWRSTS_OFF_RET, /* core_ocmram */
47 [2] = PWRSTS_OFF_RET, /* core_other_bank */
48 [3] = PWRSTS_OFF_RET, /* ipu_l2ram */
49 [4] = PWRSTS_OFF_RET, /* ipu_unicache */
64 [0] = PWRSTS_OFF_RET, /* aessmem */
65 [1] = PWRSTS_OFF_RET, /* periphmem */
68 [0] = PWRSTS_OFF_RET, /* aessmem */
69 [1] = PWRSTS_OFF_RET, /* periphmem */
93 [0] = PWRSTS_OFF_RET, /* dss_mem */
96 [0] = PWRSTS_OFF_RET, /* dss_mem */
111 [0] = PWRSTS_OFF_RET, /* cpu0_l1 */
128 [0] = PWRSTS_OFF_RET, /* cpu1_l1 */
144 [0] = PWRSTS_OFF_RET, /* emu_bank */
147 [0] = PWRSTS_OFF_RET, /* emu_bank */
161 [0] = PWRSTS_OFF_RET, /* mpu_l2 */
165 [0] = PWRSTS_OFF_RET, /* mpu_l2 */
166 [1] = PWRSTS_OFF_RET, /* mpu_ram */
187 .pwrsts_logic_ret = PWRSTS_OFF_RET,
190 [0] = PWRSTS_OFF_RET, /* dsp_edma */
191 [1] = PWRSTS_OFF_RET, /* dsp_l1 */
192 [2] = PWRSTS_OFF_RET, /* dsp_l2 */
195 [0] = PWRSTS_OFF_RET, /* dsp_edma */
196 [1] = PWRSTS_OFF_RET, /* dsp_l1 */
197 [2] = PWRSTS_OFF_RET, /* dsp_l2 */
211 [0] = PWRSTS_OFF_RET, /* cam_mem */
214 [0] = PWRSTS_OFF_RET, /* cam_mem */
226 .pwrsts_logic_ret = PWRSTS_OFF_RET,
229 [0] = PWRSTS_OFF_RET, /* l3init_bank1 */
230 [1] = PWRSTS_OFF_RET, /* l3init_bank2 */
233 [0] = PWRSTS_OFF_RET, /* l3init_bank1 */
234 [1] = PWRSTS_OFF_RET, /* l3init_bank2 */
248 [0] = PWRSTS_OFF_RET, /* gpu_mem */
251 [0] = PWRSTS_OFF_RET, /* gpu_mem */
281 [0] = PWRSTS_OFF_RET, /* hwa_mem */
282 [1] = PWRSTS_OFF_RET, /* sl2_mem */
283 [2] = PWRSTS_OFF_RET, /* tcm1_mem */
284 [3] = PWRSTS_OFF_RET, /* tcm2_mem */
287 [0] = PWRSTS_OFF_RET, /* hwa_mem */
288 [1] = PWRSTS_OFF_RET, /* sl2_mem */
289 [2] = PWRSTS_OFF_RET, /* tcm1_mem */
290 [3] = PWRSTS_OFF_RET, /* tcm2_mem */