Lines Matching +full:secure +full:- +full:reg +full:- +full:access
1 // SPDX-License-Identifier: GPL-2.0-only
20 #include <linux/irqchip/arm-gic.h>
25 #include <asm/hardware/cache-l2x0.h>
30 #include "omap-wakeupgen.h"
36 #include "omap4-sar-layout.h"
37 #include "omap-secure.h"
64 * We need to be careful about re-ordering which can happen as a result
75 * The mb() and wmb() barriers only operate only on the MPU->MA->EMIF
88 * OMAP4 Errata i688 - asynchronous bridge corruption when entering WFI.
103 * The work-around for this errata needs all the initiators connected
106 * access is performed to the target right before executing the WFI.
113 * operates on both the MPU->MA->EMIF path but also the MPU->OCP path
133 np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu"); in omap4_sram_init()
219 void omap4_l2c310_write_sec(unsigned long val, unsigned reg) in omap4_l2c310_write_sec() argument
223 switch (reg) { in omap4_l2c310_write_sec()
245 WARN_ONCE(1, "OMAP L2C310: ignoring write to reg 0x%x\n", reg); in omap4_l2c310_write_sec()
257 return -ENOMEM; in omap_l2_cache_init()
278 * multi-omap builds in omap4_sar_ram_init()
294 { .compatible = "ti,omap4-wugen-mpu", },
295 { .compatible = "ti,omap5-wugen-mpu", },
315 np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic"); in omap_gic_of_init()
319 np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-twd-timer"); in omap_gic_of_init()