Lines Matching refs:H2_PAD_CFG
481 #define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS \ in pcm037_init() macro
484 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, H2_PAD_CFG); in pcm037_init()
485 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, H2_PAD_CFG); in pcm037_init()
486 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, H2_PAD_CFG); in pcm037_init()
487 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, H2_PAD_CFG); in pcm037_init()
488 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, H2_PAD_CFG); /* USBH2_DATA0 */ in pcm037_init()
489 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, H2_PAD_CFG); /* USBH2_DATA1 */ in pcm037_init()
490 mxc_iomux_set_pad(MX31_PIN_SRXD6, H2_PAD_CFG); /* USBH2_DATA2 */ in pcm037_init()
491 mxc_iomux_set_pad(MX31_PIN_STXD6, H2_PAD_CFG); /* USBH2_DATA3 */ in pcm037_init()
492 mxc_iomux_set_pad(MX31_PIN_SFS3, H2_PAD_CFG); /* USBH2_DATA4 */ in pcm037_init()
493 mxc_iomux_set_pad(MX31_PIN_SCK3, H2_PAD_CFG); /* USBH2_DATA5 */ in pcm037_init()
494 mxc_iomux_set_pad(MX31_PIN_SRXD3, H2_PAD_CFG); /* USBH2_DATA6 */ in pcm037_init()
495 mxc_iomux_set_pad(MX31_PIN_STXD3, H2_PAD_CFG); /* USBH2_DATA7 */ in pcm037_init()