Lines Matching refs:clk_h
77 static struct clk clk_h = { variable
146 .parent = &clk_h,
151 .parent = &clk_h,
156 .parent = &clk_h,
161 .parent = &clk_h,
166 .parent = &clk_h,
171 .parent = &clk_h,
176 .parent = &clk_h,
181 .parent = &clk_h,
186 .parent = &clk_h,
191 .parent = &clk_h,
196 .parent = &clk_h,
201 .parent = &clk_h,
216 INIT_CK(NULL, "hclk", &clk_h),
528 clk_m2p0.rate = clk_h.rate; in ep93xx_dma_clock_init()
529 clk_m2p1.rate = clk_h.rate; in ep93xx_dma_clock_init()
530 clk_m2p2.rate = clk_h.rate; in ep93xx_dma_clock_init()
531 clk_m2p3.rate = clk_h.rate; in ep93xx_dma_clock_init()
532 clk_m2p4.rate = clk_h.rate; in ep93xx_dma_clock_init()
533 clk_m2p5.rate = clk_h.rate; in ep93xx_dma_clock_init()
534 clk_m2p6.rate = clk_h.rate; in ep93xx_dma_clock_init()
535 clk_m2p7.rate = clk_h.rate; in ep93xx_dma_clock_init()
536 clk_m2p8.rate = clk_h.rate; in ep93xx_dma_clock_init()
537 clk_m2p9.rate = clk_h.rate; in ep93xx_dma_clock_init()
538 clk_m2m0.rate = clk_h.rate; in ep93xx_dma_clock_init()
539 clk_m2m1.rate = clk_h.rate; in ep93xx_dma_clock_init()
555 clk_h.rate = clk_pll1.rate / hclk_divisors[(value >> 20) & 0x7]; in ep93xx_clock_init()
556 clk_p.rate = clk_h.rate / pclk_divisors[(value >> 18) & 0x3]; in ep93xx_clock_init()
582 clk_f.rate / 1000000, clk_h.rate / 1000000, in ep93xx_clock_init()