Lines Matching +full:ctrl +full:- +full:len
1 // SPDX-License-Identifier: GPL-2.0-only
10 * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
13 #define pr_fmt(fmt) "hw-breakpoint: " fmt
150 /* We don't support the memory-mapped interface. */ in debug_arch_supported()
215 return core_has_mismatch_brps() ? brps - 1 : brps; in get_num_brps()
253 return -ENODEV; in enable_monitor_mode()
261 return -EPERM; in enable_monitor_mode()
289 * Check if 8-bit byte-address select is available.
295 struct arch_hw_breakpoint_ctrl ctrl; in get_max_wp_len() local
301 memset(&ctrl, 0, sizeof(ctrl)); in get_max_wp_len()
302 ctrl.len = ARM_BREAKPOINT_LEN_8; in get_max_wp_len()
303 ctrl_reg = encode_ctrl_reg(ctrl); in get_max_wp_len()
327 u32 addr, ctrl; in arch_install_hw_breakpoint() local
329 addr = info->address; in arch_install_hw_breakpoint()
330 ctrl = encode_ctrl_reg(info->ctrl) | 0x1; in arch_install_hw_breakpoint()
332 if (info->ctrl.type == ARM_BREAKPOINT_EXECUTE) { in arch_install_hw_breakpoint()
357 return -EBUSY; in arch_install_hw_breakpoint()
361 if (info->step_ctrl.enabled) { in arch_install_hw_breakpoint()
362 addr = info->trigger & ~0x3; in arch_install_hw_breakpoint()
363 ctrl = encode_ctrl_reg(info->step_ctrl); in arch_install_hw_breakpoint()
364 if (info->ctrl.type != ARM_BREAKPOINT_EXECUTE) { in arch_install_hw_breakpoint()
375 write_wb_reg(ctrl_base + i, ctrl); in arch_install_hw_breakpoint()
385 if (info->ctrl.type == ARM_BREAKPOINT_EXECUTE) { in arch_uninstall_hw_breakpoint()
413 if (info->ctrl.type != ARM_BREAKPOINT_EXECUTE && in arch_uninstall_hw_breakpoint()
414 info->step_ctrl.enabled) { in arch_uninstall_hw_breakpoint()
450 unsigned int len; in arch_check_bp_in_kernelspace() local
453 va = hw->address; in arch_check_bp_in_kernelspace()
454 len = get_hbp_len(hw->ctrl.len); in arch_check_bp_in_kernelspace()
456 return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE); in arch_check_bp_in_kernelspace()
464 int arch_bp_generic_fields(struct arch_hw_breakpoint_ctrl ctrl, in arch_bp_generic_fields() argument
468 switch (ctrl.type) { in arch_bp_generic_fields()
482 return -EINVAL; in arch_bp_generic_fields()
485 /* Len */ in arch_bp_generic_fields()
486 switch (ctrl.len) { in arch_bp_generic_fields()
500 return -EINVAL; in arch_bp_generic_fields()
514 switch (attr->bp_type) { in arch_build_bp_info()
516 hw->ctrl.type = ARM_BREAKPOINT_EXECUTE; in arch_build_bp_info()
519 hw->ctrl.type = ARM_BREAKPOINT_LOAD; in arch_build_bp_info()
522 hw->ctrl.type = ARM_BREAKPOINT_STORE; in arch_build_bp_info()
525 hw->ctrl.type = ARM_BREAKPOINT_LOAD | ARM_BREAKPOINT_STORE; in arch_build_bp_info()
528 return -EINVAL; in arch_build_bp_info()
531 /* Len */ in arch_build_bp_info()
532 switch (attr->bp_len) { in arch_build_bp_info()
534 hw->ctrl.len = ARM_BREAKPOINT_LEN_1; in arch_build_bp_info()
537 hw->ctrl.len = ARM_BREAKPOINT_LEN_2; in arch_build_bp_info()
540 hw->ctrl.len = ARM_BREAKPOINT_LEN_4; in arch_build_bp_info()
543 hw->ctrl.len = ARM_BREAKPOINT_LEN_8; in arch_build_bp_info()
544 if ((hw->ctrl.type != ARM_BREAKPOINT_EXECUTE) in arch_build_bp_info()
549 return -EINVAL; in arch_build_bp_info()
558 if (hw->ctrl.type == ARM_BREAKPOINT_EXECUTE && in arch_build_bp_info()
559 hw->ctrl.len != ARM_BREAKPOINT_LEN_2 && in arch_build_bp_info()
560 hw->ctrl.len != ARM_BREAKPOINT_LEN_4) in arch_build_bp_info()
561 return -EINVAL; in arch_build_bp_info()
564 hw->address = attr->bp_addr; in arch_build_bp_info()
567 hw->ctrl.privilege = ARM_BREAKPOINT_USER; in arch_build_bp_info()
569 hw->ctrl.privilege |= ARM_BREAKPOINT_PRIV; in arch_build_bp_info()
572 hw->ctrl.enabled = !attr->disabled; in arch_build_bp_info()
575 hw->ctrl.mismatch = 0; in arch_build_bp_info()
581 * Validate the arch-specific HW Breakpoint register settings.
592 return -ENODEV; in hw_breakpoint_arch_parse()
600 if (hw->ctrl.len == ARM_BREAKPOINT_LEN_8) in hw_breakpoint_arch_parse()
602 offset = hw->address & alignment_mask; in hw_breakpoint_arch_parse()
610 if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2) in hw_breakpoint_arch_parse()
615 if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1) in hw_breakpoint_arch_parse()
619 ret = -EINVAL; in hw_breakpoint_arch_parse()
623 hw->address &= ~alignment_mask; in hw_breakpoint_arch_parse()
624 hw->ctrl.len <<= offset; in hw_breakpoint_arch_parse()
628 * Mismatch breakpoints are required for single-stepping in hw_breakpoint_arch_parse()
632 return -EINVAL; in hw_breakpoint_arch_parse()
636 return -EPERM; in hw_breakpoint_arch_parse()
639 * Per-cpu breakpoints are not supported by our stepping in hw_breakpoint_arch_parse()
642 if (!bp->hw.target) in hw_breakpoint_arch_parse()
643 return -EINVAL; in hw_breakpoint_arch_parse()
650 (hw->ctrl.type == ARM_BREAKPOINT_LOAD || in hw_breakpoint_arch_parse()
651 hw->ctrl.type == ARM_BREAKPOINT_STORE)) in hw_breakpoint_arch_parse()
652 return -EINVAL; in hw_breakpoint_arch_parse()
660 * Enable/disable single-stepping over the breakpoint bp at address addr.
667 info->step_ctrl.mismatch = 1; in enable_single_step()
668 info->step_ctrl.len = ARM_BREAKPOINT_LEN_4; in enable_single_step()
669 info->step_ctrl.type = ARM_BREAKPOINT_EXECUTE; in enable_single_step()
670 info->step_ctrl.privilege = info->ctrl.privilege; in enable_single_step()
671 info->step_ctrl.enabled = 1; in enable_single_step()
672 info->trigger = addr; in enable_single_step()
679 counter_arch_bp(bp)->step_ctrl.enabled = 0; in disable_single_step()
690 struct arch_hw_breakpoint_ctrl ctrl; in watchpoint_handler() local
711 info->trigger = wp->attr.bp_addr; in watchpoint_handler()
713 if (info->ctrl.len == ARM_BREAKPOINT_LEN_8) in watchpoint_handler()
725 decode_ctrl_reg(ctrl_reg, &ctrl); in watchpoint_handler()
726 if (!((1 << (addr & alignment_mask)) & ctrl.len)) in watchpoint_handler()
738 info->trigger = addr; in watchpoint_handler()
741 pr_debug("watchpoint fired: address = 0x%x\n", info->trigger); in watchpoint_handler()
746 * mismatch breakpoint so we can single-step over the in watchpoint_handler()
774 if (!info->step_ctrl.enabled) in watchpoint_single_step_handler()
779 * single-step. in watchpoint_single_step_handler()
781 if (info->trigger != pc) in watchpoint_single_step_handler()
795 struct arch_hw_breakpoint_ctrl ctrl; in breakpoint_handler() local
800 addr = regs->ARM_pc; in breakpoint_handler()
820 decode_ctrl_reg(ctrl_reg, &ctrl); in breakpoint_handler()
821 if ((1 << (addr & 0x3)) & ctrl.len) { in breakpoint_handler()
822 info->trigger = addr; in breakpoint_handler()
825 if (!bp->overflow_handler) in breakpoint_handler()
832 if (info->step_ctrl.enabled) in breakpoint_handler()
838 /* Handle any pending watchpoint single-step breakpoints. */ in breakpoint_handler()
881 * One-time initialisation.
929 * can be maintained across low-power modes without leaving the debug in reset_ctrl_regs()
942 * Ensure sticky power-down is clear (i.e. debug logic is in reset_ctrl_regs()
947 err = -EPERM; in reset_ctrl_regs()
958 err = -EPERM; in reset_ctrl_regs()
976 * Clear any configured vector-catch events before in reset_ctrl_regs()