Lines Matching +full:reset +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-pro4";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
24 next-level-cache = <&l2>;
29 compatible = "arm,cortex-a9";
31 enable-method = "psci";
32 next-level-cache = <&l2>;
37 compatible = "arm,psci-0.2";
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 clock-frequency = <25000000>;
48 arm_timer_clk: arm-timer {
49 #clock-cells = <0>;
50 compatible = "fixed-clock";
51 clock-frequency = <50000000>;
56 compatible = "simple-bus";
57 #address-cells = <1>;
58 #size-cells = <1>;
60 interrupt-parent = <&intc>;
62 l2: l2-cache@500c0000 {
63 compatible = "socionext,uniphier-system-cache";
67 cache-unified;
68 cache-size = <(768 * 1024)>;
69 cache-sets = <256>;
70 cache-line-size = <128>;
71 cache-level = <2>;
75 compatible = "socionext,uniphier-scssi";
79 pinctrl-names = "default";
80 pinctrl-0 = <&pinctrl_spi0>;
86 compatible = "socionext,uniphier-uart";
90 pinctrl-names = "default";
91 pinctrl-0 = <&pinctrl_uart0>;
97 compatible = "socionext,uniphier-uart";
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_uart1>;
108 compatible = "socionext,uniphier-uart";
112 pinctrl-names = "default";
113 pinctrl-0 = <&pinctrl_uart2>;
119 compatible = "socionext,uniphier-uart";
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_uart3>;
130 compatible = "socionext,uniphier-gpio";
132 interrupt-parent = <&aidet>;
133 interrupt-controller;
134 #interrupt-cells = <2>;
135 gpio-controller;
136 #gpio-cells = <2>;
137 gpio-ranges = <&pinctrl 0 0 0>;
138 gpio-ranges-group-names = "gpio_range";
140 socionext,interrupt-ranges = <0 48 16>, <16 154 5>;
144 compatible = "socionext,uniphier-fi2c";
147 #address-cells = <1>;
148 #size-cells = <0>;
150 pinctrl-names = "default";
151 pinctrl-0 = <&pinctrl_i2c0>;
154 clock-frequency = <100000>;
158 compatible = "socionext,uniphier-fi2c";
161 #address-cells = <1>;
162 #size-cells = <0>;
164 pinctrl-names = "default";
165 pinctrl-0 = <&pinctrl_i2c1>;
168 clock-frequency = <100000>;
172 compatible = "socionext,uniphier-fi2c";
175 #address-cells = <1>;
176 #size-cells = <0>;
178 pinctrl-names = "default";
179 pinctrl-0 = <&pinctrl_i2c2>;
182 clock-frequency = <100000>;
186 compatible = "socionext,uniphier-fi2c";
189 #address-cells = <1>;
190 #size-cells = <0>;
192 pinctrl-names = "default";
193 pinctrl-0 = <&pinctrl_i2c3>;
196 clock-frequency = <100000>;
201 /* chip-internal connection for DMD */
203 compatible = "socionext,uniphier-fi2c";
205 #address-cells = <1>;
206 #size-cells = <0>;
210 clock-frequency = <400000>;
213 /* chip-internal connection for HDMI */
215 compatible = "socionext,uniphier-fi2c";
217 #address-cells = <1>;
218 #size-cells = <0>;
222 clock-frequency = <400000>;
225 system_bus: system-bus@58c00000 {
226 compatible = "socionext,uniphier-system-bus";
229 #address-cells = <2>;
230 #size-cells = <1>;
231 pinctrl-names = "default";
232 pinctrl-0 = <&pinctrl_system_bus>;
236 compatible = "socionext,uniphier-smpctrl";
241 compatible = "socionext,uniphier-pro4-mioctrl",
242 "simple-mfd", "syscon";
246 compatible = "socionext,uniphier-pro4-mio-clock";
247 #clock-cells = <1>;
250 mio_rst: reset {
251 compatible = "socionext,uniphier-pro4-mio-reset";
252 #reset-cells = <1>;
257 compatible = "socionext,uniphier-pro4-perictrl",
258 "simple-mfd", "syscon";
262 compatible = "socionext,uniphier-pro4-peri-clock";
263 #clock-cells = <1>;
266 peri_rst: reset {
267 compatible = "socionext,uniphier-pro4-peri-reset";
268 #reset-cells = <1>;
272 dmac: dma-controller@5a000000 {
273 compatible = "socionext,uniphier-mio-dmac";
279 #dma-cells = <1>;
283 compatible = "socionext,uniphier-sd-v2.91";
287 pinctrl-names = "default", "uhs";
288 pinctrl-0 = <&pinctrl_sd>;
289 pinctrl-1 = <&pinctrl_sd_uhs>;
291 reset-names = "host", "bridge";
293 dma-names = "rx-tx";
295 bus-width = <4>;
296 cap-sd-highspeed;
297 sd-uhs-sdr12;
298 sd-uhs-sdr25;
299 sd-uhs-sdr50;
303 compatible = "socionext,uniphier-sd-v2.91";
307 pinctrl-names = "default";
308 pinctrl-0 = <&pinctrl_emmc>;
310 reset-names = "host", "bridge", "hw";
312 dma-names = "rx-tx";
314 bus-width = <8>;
315 cap-mmc-highspeed;
316 cap-mmc-hw-reset;
317 non-removable;
321 compatible = "socionext,uniphier-sd-v2.91";
325 pinctrl-names = "default";
326 pinctrl-0 = <&pinctrl_sd1>;
328 reset-names = "host", "bridge";
330 dma-names = "rx-tx";
332 bus-width = <4>;
333 cap-sd-highspeed;
337 compatible = "socionext,uniphier-ehci", "generic-ehci";
341 pinctrl-names = "default";
342 pinctrl-0 = <&pinctrl_usb2>;
347 phy-names = "usb";
349 has-transaction-translator;
353 compatible = "socionext,uniphier-ehci", "generic-ehci";
357 pinctrl-names = "default";
358 pinctrl-0 = <&pinctrl_usb3>;
363 phy-names = "usb";
365 has-transaction-translator;
368 soc_glue: soc-glue@5f800000 {
369 compatible = "socionext,uniphier-pro4-soc-glue",
370 "simple-mfd", "syscon";
374 compatible = "socionext,uniphier-pro4-pinctrl";
377 usb-phy {
378 compatible = "socionext,uniphier-pro4-usb2-phy";
379 #address-cells = <1>;
380 #size-cells = <0>;
384 #phy-cells = <0>;
389 #phy-cells = <0>;
394 #phy-cells = <0>;
395 vbus-supply = <&usb0_vbus>;
400 #phy-cells = <0>;
401 vbus-supply = <&usb1_vbus>;
406 soc-glue@5f900000 {
407 compatible = "socionext,uniphier-pro4-soc-glue-debug",
408 "simple-mfd";
409 #address-cells = <1>;
410 #size-cells = <1>;
414 compatible = "socionext,uniphier-efuse";
419 compatible = "socionext,uniphier-efuse";
424 compatible = "socionext,uniphier-efuse";
430 compatible = "socionext,uniphier-pro4-aidet";
432 interrupt-controller;
433 #interrupt-cells = <2>;
437 compatible = "arm,cortex-a9-global-timer";
444 compatible = "arm,cortex-a9-twd-timer";
450 intc: interrupt-controller@60001000 {
451 compatible = "arm,cortex-a9-gic";
454 #interrupt-cells = <3>;
455 interrupt-controller;
459 compatible = "socionext,uniphier-pro4-sysctrl",
460 "simple-mfd", "syscon";
464 compatible = "socionext,uniphier-pro4-clock";
465 #clock-cells = <1>;
468 sys_rst: reset {
469 compatible = "socionext,uniphier-pro4-reset";
470 #reset-cells = <1>;
475 compatible = "socionext,uniphier-pro4-ave4";
479 pinctrl-names = "default";
480 pinctrl-0 = <&pinctrl_ether_rgmii>;
481 clock-names = "gio", "ether", "ether-gb", "ether-phy";
484 reset-names = "gio", "ether";
486 phy-mode = "rgmii";
487 local-mac-address = [00 00 00 00 00 00];
488 socionext,syscon-phy-mode = <&soc_glue 0>;
491 #address-cells = <1>;
492 #size-cells = <0>;
497 compatible = "socionext,uniphier-dwc3", "snps,dwc3";
500 interrupt-names = "host", "peripheral";
502 pinctrl-names = "default";
503 pinctrl-0 = <&pinctrl_usb0>;
504 clock-names = "ref", "bus_early", "suspend";
511 usb-glue@65b00000 {
512 compatible = "socionext,uniphier-pro4-dwc3-glue",
513 "simple-mfd";
514 #address-cells = <1>;
515 #size-cells = <1>;
519 compatible = "socionext,uniphier-pro4-usb3-regulator";
521 clock-names = "gio", "link";
523 reset-names = "gio", "link";
527 usb0_ssphy: ss-phy@10 {
528 compatible = "socionext,uniphier-pro4-usb3-ssphy";
530 #phy-cells = <0>;
531 clock-names = "gio", "link";
533 reset-names = "gio", "link";
535 vbus-supply = <&usb0_vbus>;
538 usb0_rst: reset@40 {
539 compatible = "socionext,uniphier-pro4-usb3-reset";
541 #reset-cells = <1>;
542 clock-names = "gio", "link";
544 reset-names = "gio", "link";
550 compatible = "socionext,uniphier-dwc3", "snps,dwc3";
553 interrupt-names = "host", "peripheral";
555 pinctrl-names = "default";
556 pinctrl-0 = <&pinctrl_usb1>;
557 clock-names = "ref", "bus_early", "suspend";
564 usb-glue@65d00000 {
565 compatible = "socionext,uniphier-pro4-dwc3-glue",
566 "simple-mfd";
567 #address-cells = <1>;
568 #size-cells = <1>;
572 compatible = "socionext,uniphier-pro4-usb3-regulator";
574 clock-names = "gio", "link";
576 reset-names = "gio", "link";
580 usb1_rst: reset@40 {
581 compatible = "socionext,uniphier-pro4-usb3-reset";
583 #reset-cells = <1>;
584 clock-names = "gio", "link";
586 reset-names = "gio", "link";
592 compatible = "socionext,uniphier-denali-nand-v5a";
594 reg-names = "nand_data", "denali_reg";
596 #address-cells = <1>;
597 #size-cells = <0>;
599 pinctrl-names = "default";
600 pinctrl-0 = <&pinctrl_nand>;
601 clock-names = "nand", "nand_x", "ecc";
608 #include "uniphier-pinctrl.dtsi"