Lines Matching +full:de_be0 +full:- +full:lcd0
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
48 #include <dt-bindings/clock/sun6i-a31-ccu.h>
49 #include <dt-bindings/reset/sun6i-a31-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <1>;
61 #address-cells = <1>;
62 #size-cells = <1>;
65 simplefb_hdmi: framebuffer-lcd0-hdmi {
66 compatible = "allwinner,simple-framebuffer",
67 "simple-framebuffer";
68 allwinner,pipeline = "de_be0-lcd0-hdmi";
76 simplefb_lcd: framebuffer-lcd0 {
77 compatible = "allwinner,simple-framebuffer",
78 "simple-framebuffer";
79 allwinner,pipeline = "de_be0-lcd0";
88 compatible = "arm,armv7-timer";
93 clock-frequency = <24000000>;
94 arm,cpu-registers-not-fw-configured;
98 enable-method = "allwinner,sun6i-a31";
99 #address-cells = <1>;
100 #size-cells = <0>;
103 compatible = "arm,cortex-a7";
107 clock-latency = <244144>; /* 8 32k periods */
108 operating-points = <
115 #cooling-cells = <2>;
119 compatible = "arm,cortex-a7";
123 clock-latency = <244144>; /* 8 32k periods */
124 operating-points = <
131 #cooling-cells = <2>;
135 compatible = "arm,cortex-a7";
139 clock-latency = <244144>; /* 8 32k periods */
140 operating-points = <
147 #cooling-cells = <2>;
151 compatible = "arm,cortex-a7";
155 clock-latency = <244144>; /* 8 32k periods */
156 operating-points = <
163 #cooling-cells = <2>;
167 thermal-zones {
170 polling-delay-passive = <250>;
171 polling-delay = <1000>;
172 thermal-sensors = <&rtp>;
174 cooling-maps {
177 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
203 compatible = "arm,cortex-a7-pmu";
211 #address-cells = <1>;
212 #size-cells = <1>;
215 osc24M: clk-24M {
216 #clock-cells = <0>;
217 compatible = "fixed-clock";
218 clock-frequency = <24000000>;
219 clock-accuracy = <50000>;
220 clock-output-names = "osc24M";
223 osc32k: clk-32k {
224 #clock-cells = <0>;
225 compatible = "fixed-clock";
226 clock-frequency = <32768>;
227 clock-accuracy = <50000>;
228 clock-output-names = "ext_osc32k";
235 * mode, using clk_set_rate auto-reparenting.
240 mii_phy_tx_clk: clk-mii-phy-tx {
241 #clock-cells = <0>;
242 compatible = "fixed-clock";
243 clock-frequency = <25000000>;
244 clock-output-names = "mii_phy_tx";
247 gmac_int_tx_clk: clk-gmac-int-tx {
248 #clock-cells = <0>;
249 compatible = "fixed-clock";
250 clock-frequency = <125000000>;
251 clock-output-names = "gmac_int_tx";
255 #clock-cells = <0>;
256 compatible = "allwinner,sun7i-a20-gmac-clk";
259 clock-output-names = "gmac_tx";
263 de: display-engine {
264 compatible = "allwinner,sun6i-a31-display-engine";
270 compatible = "simple-bus";
271 #address-cells = <1>;
272 #size-cells = <1>;
275 dma: dma-controller@1c02000 {
276 compatible = "allwinner,sun6i-a31-dma";
281 #dma-cells = <1>;
284 tcon0: lcd-controller@1c0c000 {
285 compatible = "allwinner,sun6i-a31-tcon";
289 reset-names = "lcd";
293 clock-names = "ahb",
294 "tcon-ch0",
295 "tcon-ch1";
296 clock-output-names = "tcon0-pixel-clock";
297 #clock-cells = <0>;
300 #address-cells = <1>;
301 #size-cells = <0>;
304 #address-cells = <1>;
305 #size-cells = <0>;
310 remote-endpoint = <&drc0_out_tcon0>;
315 remote-endpoint = <&drc1_out_tcon0>;
320 #address-cells = <1>;
321 #size-cells = <0>;
326 remote-endpoint = <&hdmi_in_tcon0>;
327 allwinner,tcon-channel = <1>;
333 tcon1: lcd-controller@1c0d000 {
334 compatible = "allwinner,sun6i-a31-tcon";
338 reset-names = "lcd";
342 clock-names = "ahb",
343 "tcon-ch0",
344 "tcon-ch1";
345 clock-output-names = "tcon1-pixel-clock";
346 #clock-cells = <0>;
349 #address-cells = <1>;
350 #size-cells = <0>;
353 #address-cells = <1>;
354 #size-cells = <0>;
359 remote-endpoint = <&drc0_out_tcon1>;
364 remote-endpoint = <&drc1_out_tcon1>;
369 #address-cells = <1>;
370 #size-cells = <0>;
375 remote-endpoint = <&hdmi_in_tcon1>;
376 allwinner,tcon-channel = <1>;
383 compatible = "allwinner,sun7i-a20-mmc";
389 clock-names = "ahb",
394 reset-names = "ahb";
396 pinctrl-names = "default";
397 pinctrl-0 = <&mmc0_pins>;
399 #address-cells = <1>;
400 #size-cells = <0>;
404 compatible = "allwinner,sun7i-a20-mmc";
410 clock-names = "ahb",
415 reset-names = "ahb";
417 pinctrl-names = "default";
418 pinctrl-0 = <&mmc1_pins>;
420 #address-cells = <1>;
421 #size-cells = <0>;
425 compatible = "allwinner,sun7i-a20-mmc";
431 clock-names = "ahb",
436 reset-names = "ahb";
439 #address-cells = <1>;
440 #size-cells = <0>;
444 compatible = "allwinner,sun7i-a20-mmc";
450 clock-names = "ahb",
455 reset-names = "ahb";
458 #address-cells = <1>;
459 #size-cells = <0>;
463 compatible = "allwinner,sun6i-a31-hdmi";
470 clock-names = "ahb", "mod", "ddc", "pll-0", "pll-1";
472 reset-names = "ahb";
473 dma-names = "ddc-tx", "ddc-rx", "audio-tx";
478 #address-cells = <1>;
479 #size-cells = <0>;
482 #address-cells = <1>;
483 #size-cells = <0>;
488 remote-endpoint = <&tcon0_out_hdmi>;
493 remote-endpoint = <&tcon1_out_hdmi>;
504 compatible = "allwinner,sun6i-a31-musb";
509 interrupt-names = "mc";
511 phy-names = "usb";
518 compatible = "allwinner,sun6i-a31-usb-phy";
522 reg-names = "phy_ctrl",
528 clock-names = "usb0_phy",
534 reset-names = "usb0_reset",
538 #phy-cells = <1>;
542 compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
548 phy-names = "usb";
553 compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
559 phy-names = "usb";
564 compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
570 phy-names = "usb";
575 compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
581 phy-names = "usb";
586 compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
595 compatible = "allwinner,sun6i-a31-ccu";
598 clock-names = "hosc", "losc";
599 #clock-cells = <1>;
600 #reset-cells = <1>;
604 compatible = "allwinner,sun6i-a31-pinctrl";
611 clock-names = "apb", "hosc", "losc";
612 gpio-controller;
613 interrupt-controller;
614 #interrupt-cells = <3>;
615 #gpio-cells = <3>;
617 gmac_gmii_pins: gmac-gmii-pins {
630 drive-strength = <30>;
633 gmac_mii_pins: gmac-mii-pins {
642 gmac_rgmii_pins: gmac-rgmii-pins {
652 drive-strength = <40>;
655 i2c0_pins: i2c0-pins {
660 i2c1_pins: i2c1-pins {
665 i2c2_pins: i2c2-pins {
670 lcd0_rgb888_pins: lcd0-rgb888-pins {
678 function = "lcd0";
681 mmc0_pins: mmc0-pins {
685 drive-strength = <30>;
686 bias-pull-up;
689 mmc1_pins: mmc1-pins {
693 drive-strength = <30>;
694 bias-pull-up;
697 mmc2_4bit_pins: mmc2-4bit-pins {
701 drive-strength = <30>;
702 bias-pull-up;
705 mmc2_8bit_emmc_pins: mmc2-8bit-emmc-pins {
711 drive-strength = <30>;
712 bias-pull-up;
715 mmc3_8bit_emmc_pins: mmc3-8bit-emmc-pins {
721 drive-strength = <40>;
722 bias-pull-up;
725 spdif_tx_pin: spdif-tx-pin {
730 uart0_ph_pins: uart0-ph-pins {
737 compatible = "allwinner,sun4i-a10-timer";
749 compatible = "allwinner,sun6i-a31-wdt";
756 #sound-dai-cells = <0>;
757 compatible = "allwinner,sun6i-a31-spdif";
762 clock-names = "apb", "spdif";
764 dma-names = "rx", "tx";
769 #sound-dai-cells = <0>;
770 compatible = "allwinner,sun6i-a31-i2s";
775 clock-names = "apb", "mod";
777 dma-names = "rx", "tx";
782 #sound-dai-cells = <0>;
783 compatible = "allwinner,sun6i-a31-i2s";
788 clock-names = "apb", "mod";
790 dma-names = "rx", "tx";
795 compatible = "allwinner,sun4i-a10-lradc-keys";
802 compatible = "allwinner,sun6i-a31-ts";
805 #thermal-sensor-cells = <0>;
809 compatible = "snps,dw-apb-uart";
812 reg-shift = <2>;
813 reg-io-width = <4>;
817 dma-names = "rx", "tx";
822 compatible = "snps,dw-apb-uart";
825 reg-shift = <2>;
826 reg-io-width = <4>;
830 dma-names = "rx", "tx";
835 compatible = "snps,dw-apb-uart";
838 reg-shift = <2>;
839 reg-io-width = <4>;
843 dma-names = "rx", "tx";
848 compatible = "snps,dw-apb-uart";
851 reg-shift = <2>;
852 reg-io-width = <4>;
856 dma-names = "rx", "tx";
861 compatible = "snps,dw-apb-uart";
864 reg-shift = <2>;
865 reg-io-width = <4>;
869 dma-names = "rx", "tx";
874 compatible = "snps,dw-apb-uart";
877 reg-shift = <2>;
878 reg-io-width = <4>;
882 dma-names = "rx", "tx";
887 compatible = "allwinner,sun6i-a31-i2c";
892 pinctrl-names = "default";
893 pinctrl-0 = <&i2c0_pins>;
895 #address-cells = <1>;
896 #size-cells = <0>;
900 compatible = "allwinner,sun6i-a31-i2c";
905 pinctrl-names = "default";
906 pinctrl-0 = <&i2c1_pins>;
908 #address-cells = <1>;
909 #size-cells = <0>;
913 compatible = "allwinner,sun6i-a31-i2c";
918 pinctrl-names = "default";
919 pinctrl-0 = <&i2c2_pins>;
921 #address-cells = <1>;
922 #size-cells = <0>;
926 compatible = "allwinner,sun6i-a31-i2c";
932 #address-cells = <1>;
933 #size-cells = <0>;
937 compatible = "allwinner,sun7i-a20-gmac";
940 interrupt-names = "macirq";
942 clock-names = "stmmaceth", "allwinner_gmac_tx";
944 reset-names = "stmmaceth";
946 snps,fixed-burst;
951 compatible = "snps,dwmac-mdio";
952 #address-cells = <1>;
953 #size-cells = <0>;
957 crypto: crypto-engine@1c15000 {
958 compatible = "allwinner,sun6i-a31-crypto",
959 "allwinner,sun4i-a10-crypto";
963 clock-names = "ahb", "mod";
965 reset-names = "ahb";
969 #sound-dai-cells = <0>;
970 compatible = "allwinner,sun6i-a31-codec";
974 clock-names = "apb", "codec";
977 dma-names = "rx", "tx";
982 compatible = "allwinner,sun6i-a31-hstimer",
983 "allwinner,sun7i-a20-hstimer";
994 compatible = "allwinner,sun6i-a31-spi";
998 clock-names = "ahb", "mod";
1000 dma-names = "rx", "tx";
1003 #address-cells = <1>;
1004 #size-cells = <0>;
1008 compatible = "allwinner,sun6i-a31-spi";
1012 clock-names = "ahb", "mod";
1014 dma-names = "rx", "tx";
1017 #address-cells = <1>;
1018 #size-cells = <0>;
1022 compatible = "allwinner,sun6i-a31-spi";
1026 clock-names = "ahb", "mod";
1028 dma-names = "rx", "tx";
1031 #address-cells = <1>;
1032 #size-cells = <0>;
1036 compatible = "allwinner,sun6i-a31-spi";
1040 clock-names = "ahb", "mod";
1042 dma-names = "rx", "tx";
1045 #address-cells = <1>;
1046 #size-cells = <0>;
1049 gic: interrupt-controller@1c81000 {
1050 compatible = "arm,gic-400";
1055 interrupt-controller;
1056 #interrupt-cells = <3>;
1060 fe0: display-frontend@1e00000 {
1061 compatible = "allwinner,sun6i-a31-display-frontend";
1066 clock-names = "ahb", "mod",
1071 #address-cells = <1>;
1072 #size-cells = <0>;
1075 #address-cells = <1>;
1076 #size-cells = <0>;
1081 remote-endpoint = <&be0_in_fe0>;
1086 remote-endpoint = <&be1_in_fe0>;
1092 fe1: display-frontend@1e20000 {
1093 compatible = "allwinner,sun6i-a31-display-frontend";
1098 clock-names = "ahb", "mod",
1103 #address-cells = <1>;
1104 #size-cells = <0>;
1107 #address-cells = <1>;
1108 #size-cells = <0>;
1113 remote-endpoint = <&be0_in_fe1>;
1118 remote-endpoint = <&be1_in_fe1>;
1124 be1: display-backend@1e40000 {
1125 compatible = "allwinner,sun6i-a31-display-backend";
1130 clock-names = "ahb", "mod",
1134 assigned-clocks = <&ccu CLK_BE1>;
1135 assigned-clock-rates = <300000000>;
1138 #address-cells = <1>;
1139 #size-cells = <0>;
1142 #address-cells = <1>;
1143 #size-cells = <0>;
1148 remote-endpoint = <&fe0_out_be1>;
1153 remote-endpoint = <&fe1_out_be1>;
1158 #address-cells = <1>;
1159 #size-cells = <0>;
1164 remote-endpoint = <&drc1_in_be1>;
1171 compatible = "allwinner,sun6i-a31-drc";
1176 clock-names = "ahb", "mod",
1180 assigned-clocks = <&ccu CLK_IEP_DRC1>;
1181 assigned-clock-rates = <300000000>;
1184 #address-cells = <1>;
1185 #size-cells = <0>;
1188 #address-cells = <1>;
1189 #size-cells = <0>;
1194 remote-endpoint = <&be1_out_drc1>;
1199 #address-cells = <1>;
1200 #size-cells = <0>;
1205 remote-endpoint = <&tcon0_in_drc1>;
1210 remote-endpoint = <&tcon1_in_drc1>;
1216 be0: display-backend@1e60000 {
1217 compatible = "allwinner,sun6i-a31-display-backend";
1222 clock-names = "ahb", "mod",
1226 assigned-clocks = <&ccu CLK_BE0>;
1227 assigned-clock-rates = <300000000>;
1230 #address-cells = <1>;
1231 #size-cells = <0>;
1234 #address-cells = <1>;
1235 #size-cells = <0>;
1240 remote-endpoint = <&fe0_out_be0>;
1245 remote-endpoint = <&fe1_out_be0>;
1253 remote-endpoint = <&drc0_in_be0>;
1260 compatible = "allwinner,sun6i-a31-drc";
1265 clock-names = "ahb", "mod",
1269 assigned-clocks = <&ccu CLK_IEP_DRC0>;
1270 assigned-clock-rates = <300000000>;
1273 #address-cells = <1>;
1274 #size-cells = <0>;
1280 remote-endpoint = <&be0_out_drc0>;
1285 #address-cells = <1>;
1286 #size-cells = <0>;
1291 remote-endpoint = <&tcon0_in_drc0>;
1296 remote-endpoint = <&tcon1_in_drc0>;
1303 #clock-cells = <1>;
1304 compatible = "allwinner,sun6i-a31-rtc";
1309 clock-output-names = "osc32k";
1312 nmi_intc: interrupt-controller@1f00c00 {
1313 compatible = "allwinner,sun6i-a31-r-intc";
1314 interrupt-controller;
1315 #interrupt-cells = <2>;
1321 compatible = "allwinner,sun6i-a31-prcm";
1325 compatible = "allwinner,sun6i-a31-ar100-clk";
1326 #clock-cells = <0>;
1330 clock-output-names = "ar100";
1334 compatible = "fixed-factor-clock";
1335 #clock-cells = <0>;
1336 clock-div = <1>;
1337 clock-mult = <1>;
1339 clock-output-names = "ahb0";
1343 compatible = "allwinner,sun6i-a31-apb0-clk";
1344 #clock-cells = <0>;
1346 clock-output-names = "apb0";
1350 compatible = "allwinner,sun6i-a31-apb0-gates-clk";
1351 #clock-cells = <1>;
1353 clock-output-names = "apb0_pio", "apb0_ir",
1360 #clock-cells = <0>;
1361 compatible = "allwinner,sun4i-a10-mod0-clk";
1363 clock-output-names = "ir";
1367 compatible = "allwinner,sun6i-a31-clock-reset";
1368 #reset-cells = <1>;
1373 compatible = "allwinner,sun6i-a31-cpuconfig";
1378 compatible = "allwinner,sun6i-a31-ir";
1380 clock-names = "apb", "ir";
1388 compatible = "allwinner,sun6i-a31-r-pinctrl";
1393 clock-names = "apb", "hosc", "losc";
1395 gpio-controller;
1396 interrupt-controller;
1397 #interrupt-cells = <3>;
1398 #gpio-cells = <3>;
1400 s_ir_rx_pin: s-ir-rx-pin {
1405 s_p2wi_pins: s-p2wi-pins {
1412 compatible = "allwinner,sun6i-a31-p2wi";
1416 clock-frequency = <100000>;
1418 pinctrl-names = "default";
1419 pinctrl-0 = <&s_p2wi_pins>;
1421 #address-cells = <1>;
1422 #size-cells = <0>;