Lines Matching refs:rcc
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
77 clocks = <&rcc TIM5_CK>;
85 clocks = <&rcc LPTIM1_CK>;
113 clocks = <&rcc SPI2_CK>;
124 clocks = <&rcc SPI3_CK>;
133 clocks = <&rcc USART2_CK>;
143 resets = <&rcc STM32H7_APB1L_RESET(I2C1)>;
144 clocks = <&rcc I2C1_CK>;
155 resets = <&rcc STM32H7_APB1L_RESET(I2C2)>;
156 clocks = <&rcc I2C2_CK>;
167 resets = <&rcc STM32H7_APB1L_RESET(I2C3)>;
168 clocks = <&rcc I2C3_CK>;
175 clocks = <&rcc DAC12_CK>;
201 clocks = <&rcc USART1_CK>;
210 clocks = <&rcc SPI1_CK>;
220 clocks = <&rcc SPI4_CK>;
230 clocks = <&rcc SPI5_CK>;
245 clocks = <&rcc DMA1_CK>;
263 clocks = <&rcc DMA2_CK>;
277 clocks = <&rcc DMA1_CK>;
284 clocks = <&rcc ADC12_CK>;
315 clocks = <&rcc USB1OTG_CK>;
327 clocks = <&rcc USB2OTG_CK>;
336 clocks = <&rcc MDMA_CK>;
348 clocks = <&rcc SDMMC1_CK>;
350 resets = <&rcc STM32H7_AHB3_RESET(SDMMC1)>;
375 clocks = <&rcc SPI6_CK>;
386 resets = <&rcc STM32H7_APB4_RESET(I2C4)>;
387 clocks = <&rcc I2C4_CK>;
396 clocks = <&rcc LPTIM2_CK>;
423 clocks = <&rcc LPTIM3_CK>;
445 clocks = <&rcc LPTIM4_CK>;
461 clocks = <&rcc LPTIM5_CK>;
475 clocks = <&rcc VREF_CK>;
484 clocks = <&rcc RTCAPB_CK>, <&rcc RTC_CK>;
486 assigned-clocks = <&rcc RTC_CK>;
487 assigned-clock-parents = <&rcc LSE_CK>;
495 rcc: reset-clock-controller@58024400 { label
496 compatible = "st,stm32h743-rcc", "st,stm32-rcc";
513 clocks = <&rcc ADC3_CK>;
538 clocks = <&rcc ETH1MAC_CK>, <&rcc ETH1TX_CK>, <&rcc ETH1RX_CK>;