Lines Matching refs:rcc
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
82 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
91 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
112 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>;
121 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>;
142 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>;
151 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>;
172 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>;
180 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>;
201 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>;
210 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>;
225 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM7)>;
234 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM7)>;
250 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM12)>;
272 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>;
288 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>;
302 clocks = <&rcc 1 CLK_RTC>;
304 assigned-clocks = <&rcc 1 CLK_RTC>;
305 assigned-clock-parents = <&rcc 1 CLK_LSE>;
317 clocks = <&rcc 1 CLK_USART2>;
325 clocks = <&rcc 1 CLK_USART3>;
333 clocks = <&rcc 1 CLK_UART4>;
341 clocks = <&rcc 1 CLK_UART5>;
350 resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
351 clocks = <&rcc 1 CLK_I2C1>;
362 resets = <&rcc STM32F7_APB1_RESET(I2C2)>;
363 clocks = <&rcc 1 CLK_I2C2>;
374 resets = <&rcc STM32F7_APB1_RESET(I2C3)>;
375 clocks = <&rcc 1 CLK_I2C3>;
386 resets = <&rcc STM32F7_APB1_RESET(I2C4)>;
387 clocks = <&rcc 1 CLK_I2C4>;
397 clocks = <&rcc 0 STM32F7_APB1_CLOCK(CEC)>, <&rcc 1 CLK_HDMI_CEC>;
406 clocks = <&rcc 1 CLK_UART7>;
414 clocks = <&rcc 1 CLK_UART8>;
423 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM1)>;
445 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM8)>;
466 clocks = <&rcc 1 CLK_USART1>;
474 clocks = <&rcc 1 CLK_USART6>;
482 clocks = <&rcc 0 STM32F7_APB2_CLOCK(SDMMC2)>;
493 clocks = <&rcc 0 STM32F7_APB2_CLOCK(SDMMC1)>;
518 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM9)>;
540 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>;
556 clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>;
575 clocks = <&rcc 0 12>;
579 rcc: rcc@40023800 { label
582 compatible = "st,stm32f746-rcc", "st,stm32-rcc";
586 assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
601 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(DMA1)>;
617 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(DMA2)>;
627 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHS)>;
639 clocks = <&rcc 0 STM32F7_AHB2_CLOCK(OTGFS)>;
647 clocks = <&rcc 1 0>;