Lines Matching +full:rx +full:- +full:fifo +full:- +full:depth
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/soc/rockchip,boot-mode.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
15 interrupt-parent = <&gic>;
36 compatible = "simple-bus";
37 #address-cells = <1>;
38 #size-cells = <1>;
41 dmac1_s: dma-controller@20018000 {
46 #dma-cells = <1>;
47 arm,pl330-broken-no-flushp;
49 clock-names = "apb_pclk";
52 dmac1_ns: dma-controller@2001c000 {
57 #dma-cells = <1>;
58 arm,pl330-broken-no-flushp;
60 clock-names = "apb_pclk";
64 dmac2: dma-controller@20078000 {
69 #dma-cells = <1>;
70 arm,pl330-broken-no-flushp;
72 clock-names = "apb_pclk";
77 compatible = "fixed-clock";
78 clock-frequency = <24000000>;
79 #clock-cells = <0>;
80 clock-output-names = "xin24m";
84 compatible = "arm,mali-400";
87 clock-names = "core", "bus";
88 assigned-clocks = <&cru ACLK_GPU>;
89 assigned-clock-rates = <100000000>;
94 L2: l2-cache-controller@10138000 {
95 compatible = "arm,pl310-cache";
97 cache-unified;
98 cache-level = <2>;
102 compatible = "arm,cortex-a9-scu";
106 global_timer: global-timer@1013c200 {
107 compatible = "arm,cortex-a9-global-timer";
113 local_timer: local-timer@1013c600 {
114 compatible = "arm,cortex-a9-twd-timer";
120 gic: interrupt-controller@1013d000 {
121 compatible = "arm,cortex-a9-gic";
122 interrupt-controller;
123 #interrupt-cells = <3>;
129 compatible = "snps,dw-apb-uart";
132 reg-shift = <2>;
133 reg-io-width = <1>;
134 clock-names = "baudclk", "apb_pclk";
140 compatible = "snps,dw-apb-uart";
143 reg-shift = <2>;
144 reg-io-width = <1>;
145 clock-names = "baudclk", "apb_pclk";
191 compatible = "rockchip,rk3066-usb", "snps,dwc2";
195 clock-names = "otg";
197 g-np-tx-fifo-size = <16>;
198 g-rx-fifo-size = <275>;
199 g-tx-fifo-size = <256 128 128 64 64 32>;
201 phy-names = "usb2-phy";
210 clock-names = "otg";
213 phy-names = "usb2-phy";
218 compatible = "snps,arc-emac";
221 #address-cells = <1>;
222 #size-cells = <0>;
227 clock-names = "hclk", "macref";
228 max-speed = <100>;
229 phy-mode = "rmii";
235 compatible = "rockchip,rk2928-dw-mshc";
239 clock-names = "biu", "ciu";
241 dma-names = "rx-tx";
242 fifo-depth = <256>;
244 reset-names = "reset";
249 compatible = "rockchip,rk2928-dw-mshc";
253 clock-names = "biu", "ciu";
255 dma-names = "rx-tx";
256 fifo-depth = <256>;
258 reset-names = "reset";
263 compatible = "rockchip,rk2928-dw-mshc";
267 clock-names = "biu", "ciu";
269 dma-names = "rx-tx";
270 fifo-depth = <256>;
272 reset-names = "reset";
277 compatible = "rockchip,rk3066-pmu", "syscon", "simple-mfd";
280 reboot-mode {
281 compatible = "syscon-reboot-mode";
283 mode-normal = <BOOT_NORMAL>;
284 mode-recovery = <BOOT_RECOVERY>;
285 mode-bootloader = <BOOT_FASTBOOT>;
286 mode-loader = <BOOT_BL_DOWNLOAD>;
296 compatible = "rockchip,rk3066-i2c";
299 #address-cells = <1>;
300 #size-cells = <0>;
304 clock-names = "i2c";
311 compatible = "rockchip,rk3066-i2c";
314 #address-cells = <1>;
315 #size-cells = <0>;
320 clock-names = "i2c";
326 compatible = "rockchip,rk2928-pwm";
328 #pwm-cells = <2>;
334 compatible = "rockchip,rk2928-pwm";
336 #pwm-cells = <2>;
342 compatible = "snps,dw-wdt";
350 compatible = "rockchip,rk2928-pwm";
352 #pwm-cells = <2>;
358 compatible = "rockchip,rk2928-pwm";
360 #pwm-cells = <2>;
366 compatible = "rockchip,rk3066-i2c";
369 #address-cells = <1>;
370 #size-cells = <0>;
375 clock-names = "i2c";
381 compatible = "rockchip,rk3066-i2c";
384 #address-cells = <1>;
385 #size-cells = <0>;
390 clock-names = "i2c";
396 compatible = "rockchip,rk3066-i2c";
399 #address-cells = <1>;
400 #size-cells = <0>;
405 clock-names = "i2c";
411 compatible = "snps,dw-apb-uart";
414 reg-shift = <2>;
415 reg-io-width = <1>;
416 clock-names = "baudclk", "apb_pclk";
422 compatible = "snps,dw-apb-uart";
425 reg-shift = <2>;
426 reg-io-width = <1>;
427 clock-names = "baudclk", "apb_pclk";
436 #io-channel-cells = <1>;
438 clock-names = "saradc", "apb_pclk";
440 reset-names = "saradc-apb";
445 compatible = "rockchip,rk3066-spi";
447 clock-names = "spiclk", "apb_pclk";
450 #address-cells = <1>;
451 #size-cells = <0>;
453 dma-names = "tx", "rx";
458 compatible = "rockchip,rk3066-spi";
460 clock-names = "spiclk", "apb_pclk";
463 #address-cells = <1>;
464 #size-cells = <0>;
466 dma-names = "tx", "rx";