Lines Matching refs:gcc
8 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
54 clocks = <&gcc GCC_APPS_CLK_SRC>;
68 clocks = <&gcc GCC_APPS_CLK_SRC>;
82 clocks = <&gcc GCC_APPS_CLK_SRC>;
96 clocks = <&gcc GCC_APPS_CLK_SRC>;
184 gcc: clock-controller@1800000 { label
185 compatible = "qcom,gcc-ipq4019";
194 clocks = <&gcc GCC_PRNG_AHB_CLK>;
213 clocks = <&gcc GCC_BLSP1_AHB_CLK>;
224 clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
225 <&gcc GCC_BLSP1_AHB_CLK>;
238 clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
239 <&gcc GCC_BLSP1_AHB_CLK>;
252 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
253 <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;
266 clocks = <&gcc GCC_BLSP1_AHB_CLK>,
267 <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
280 clocks = <&gcc GCC_CRYPTO_AHB_CLK>;
291 clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
292 <&gcc GCC_CRYPTO_AXI_CLK>,
293 <&gcc GCC_CRYPTO_CLK>;
349 clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
350 <&gcc GCC_BLSP1_AHB_CLK>;
361 clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
362 <&gcc GCC_BLSP1_AHB_CLK>;
406 clocks = <&gcc GCC_PCIE_AHB_CLK>,
407 <&gcc GCC_PCIE_AXI_M_CLK>,
408 <&gcc GCC_PCIE_AXI_S_CLK>;
413 resets = <&gcc PCIE_AXI_M_ARES>,
414 <&gcc PCIE_AXI_S_ARES>,
415 <&gcc PCIE_PIPE_ARES>,
416 <&gcc PCIE_AXI_M_VMIDMT_ARES>,
417 <&gcc PCIE_AXI_S_XPU_ARES>,
418 <&gcc PCIE_PARF_XPU_ARES>,
419 <&gcc PCIE_PHY_ARES>,
420 <&gcc PCIE_AXI_M_STICKY_ARES>,
421 <&gcc PCIE_PIPE_STICKY_ARES>,
422 <&gcc PCIE_PWR_ARES>,
423 <&gcc PCIE_AHB_ARES>,
424 <&gcc PCIE_PHY_AHB_ARES>;
445 clocks = <&gcc GCC_QPIC_CLK>;
457 clocks = <&gcc GCC_QPIC_CLK>,
458 <&gcc GCC_QPIC_AHB_CLK>;
479 resets = <&gcc WIFI0_CPU_INIT_RESET>,
480 <&gcc WIFI0_RADIO_SRIF_RESET>,
481 <&gcc WIFI0_RADIO_WARM_RESET>,
482 <&gcc WIFI0_RADIO_COLD_RESET>,
483 <&gcc WIFI0_CORE_WARM_RESET>,
484 <&gcc WIFI0_CORE_COLD_RESET>;
488 clocks = <&gcc GCC_WCSS2G_CLK>,
489 <&gcc GCC_WCSS2G_REF_CLK>,
490 <&gcc GCC_WCSS2G_RTC_CLK>;
521 resets = <&gcc WIFI1_CPU_INIT_RESET>,
522 <&gcc WIFI1_RADIO_SRIF_RESET>,
523 <&gcc WIFI1_RADIO_WARM_RESET>,
524 <&gcc WIFI1_RADIO_COLD_RESET>,
525 <&gcc WIFI1_CORE_WARM_RESET>,
526 <&gcc WIFI1_CORE_COLD_RESET>;
530 clocks = <&gcc GCC_WCSS5G_CLK>,
531 <&gcc GCC_WCSS5G_REF_CLK>,
532 <&gcc GCC_WCSS5G_RTC_CLK>;