Lines Matching +full:0 +full:x11
8 * of the GPL or the X11 license, at your option. Note that this dual
23 reg = <0x80000000 0x10000000>; /* 256 MB - minimal configuration */
42 pinctrl-0 = <&pinctrl_enet1>;
46 assigned-clock-rates = <0>, <100000000>;
54 #size-cells = <0>;
56 ethphy0: ethernet-phy@0 {
58 reg = <0>;
70 pinctrl-0 = <&pinctrl_enet2>;
74 assigned-clock-rates = <0>, <100000000>;
83 pinctrl-0 = <&pinctrl_i2c2>;
88 reg = <0x08>;
180 reg = <0x20>;
185 reg = <0x50>;
192 pinctrl-0 = <&pinctrl_uart1>;
200 pinctrl-0 = <&pinctrl_usbotg1>;
207 pinctrl-0 = <&pinctrl_usdhc3>;
219 MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x30
220 MX7D_PAD_SD2_WP__ENET1_MDC 0x30
221 MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x11
222 MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x11
223 MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x11
224 MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x11
225 MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x11
226 MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x11
227 MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x11
228 MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x11
229 MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x11
230 MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x11
231 MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x11
232 MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x11
238 MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC 0x11
239 MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0 0x11
240 MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1 0x11
241 MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2 0x11
242 MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3 0x11
243 MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL 0x11
244 MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC 0x11
245 MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0 0x11
246 MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1 0x11
247 MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2 0x11
248 MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3 0x11
249 MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x11
255 MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
256 MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f
262 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79
263 MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79
269 MX7D_PAD_SD3_CMD__SD3_CMD 0x59
270 MX7D_PAD_SD3_CLK__SD3_CLK 0x19
271 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
272 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
273 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
274 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
275 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
276 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
277 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
278 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
279 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
287 MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x14 /* OTG PWREN */