Lines Matching +full:nand +full:- +full:bus +full:- +full:width
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
5 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clk/ti-dra7-atl.h>
12 compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7";
19 stdout-path = &uart1;
22 evm_12v0: fixedregulator-evm12v0 {
24 compatible = "regulator-fixed";
25 regulator-name = "evm_12v0";
26 regulator-min-microvolt = <12000000>;
27 regulator-max-microvolt = <12000000>;
28 regulator-always-on;
29 regulator-boot-on;
32 evm_5v0: fixedregulator-evm5v0 {
33 /* Output 1 of TPS43351QDAPRQ1 on dra72-evm */
34 /* Output 1 of LM5140QRWGTQ1 on dra71-evm */
35 compatible = "regulator-fixed";
36 regulator-name = "evm_5v0";
37 regulator-min-microvolt = <5000000>;
38 regulator-max-microvolt = <5000000>;
39 vin-supply = <&evm_12v0>;
40 regulator-always-on;
41 regulator-boot-on;
44 evm_3v6: fixedregulator-evm_3v6 {
45 compatible = "regulator-fixed";
46 regulator-name = "evm_3v6";
47 regulator-min-microvolt = <3600000>;
48 regulator-max-microvolt = <3600000>;
49 vin-supply = <&evm_5v0>;
50 regulator-always-on;
51 regulator-boot-on;
54 vsys_3v3: fixedregulator-vsys3v3 {
55 /* Output 2 of TPS43351QDAPRQ1 on dra72-evm */
56 /* Output 2 of LM5140QRWGTQ1 on dra71-evm */
57 compatible = "regulator-fixed";
58 regulator-name = "vsys_3v3";
59 regulator-min-microvolt = <3300000>;
60 regulator-max-microvolt = <3300000>;
61 vin-supply = <&evm_12v0>;
62 regulator-always-on;
63 regulator-boot-on;
66 evm_3v3_sw: fixedregulator-evm_3v3 {
68 compatible = "regulator-fixed";
69 regulator-name = "evm_3v3";
70 regulator-min-microvolt = <3300000>;
71 regulator-max-microvolt = <3300000>;
72 vin-supply = <&vsys_3v3>;
73 regulator-always-on;
74 regulator-boot-on;
77 aic_dvdd: fixedregulator-aic_dvdd {
79 compatible = "regulator-fixed";
80 regulator-name = "aic_dvdd";
81 vin-supply = <&evm_3v3_sw>;
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <1800000>;
86 evm_3v3_sd: fixedregulator-sd {
87 compatible = "regulator-fixed";
88 regulator-name = "evm_3v3_sd";
89 regulator-min-microvolt = <3300000>;
90 regulator-max-microvolt = <3300000>;
91 vin-supply = <&evm_3v3_sw>;
92 enable-active-high;
97 compatible = "linux,extcon-usb-gpio";
98 id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
102 compatible = "linux,extcon-usb-gpio";
103 id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
107 compatible = "hdmi-connector";
114 remote-endpoint = <&tpd12s015_out>;
127 #address-cells = <1>;
128 #size-cells = <0>;
134 remote-endpoint = <&hdmi_out>;
142 remote-endpoint = <&hdmi_connector_in>;
149 compatible = "simple-audio-card";
150 simple-audio-card,name = "DRA7xx-EVM";
151 simple-audio-card,widgets =
156 simple-audio-card,routing =
166 simple-audio-card,format = "dsp_b";
167 simple-audio-card,bitclock-master = <&sound0_master>;
168 simple-audio-card,frame-master = <&sound0_master>;
169 simple-audio-card,bitclock-inversion;
171 sound0_master: simple-audio-card,cpu {
172 sound-dai = <&mcasp3>;
173 system-clock-frequency = <5644800>;
176 simple-audio-card,codec {
177 sound-dai = <&tlv320aic3106>;
182 vmmcwl_fixed: fixedregulator-mmcwl {
183 compatible = "regulator-fixed";
184 regulator-name = "vmmcwl_fixed";
185 regulator-min-microvolt = <1800000>;
186 regulator-max-microvolt = <1800000>;
188 enable-active-high;
194 pinctrl-single,pins = <
201 pinctrl-single,pins = <
210 clock-frequency = <400000>;
215 gpio-controller;
216 #gpio-cells = <2>;
217 interrupt-controller;
218 #interrupt-cells = <2>;
224 lines-initial-states = <0x1408>;
225 gpio-controller;
226 #gpio-cells = <2>;
227 interrupt-controller;
228 #interrupt-cells = <2>;
232 #sound-dai-cells = <0>;
235 adc-settle-ms = <40>;
236 ai3x-micbias-vg = <1>; /* 2.0V */
240 AVDD-supply = <&evm_3v3_sw>;
241 IOVDD-supply = <&evm_3v3_sw>;
242 DRVDD-supply = <&evm_3v3_sw>;
243 DVDD-supply = <&aic_dvdd>;
249 clock-frequency = <400000>;
254 gpio-controller;
255 #gpio-cells = <2>;
262 lines-initial-states = <0x0f2b>;
266 gpio-hog;
268 output-low;
269 line-name = "vin6_sel_s0";
276 interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
286 * For the existing IOdelay configuration via U-Boot we don't
287 * support NAND on dra72-evm. Keep it disabled. Enabling it
288 * requires a different configuration by U-Boot.
292 nand@0,0 {
293 /* To use NAND, DIP switch SW5 must be set like so:
297 compatible = "ti,omap2-nand";
299 interrupt-parent = <&gpmc>;
302 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */
303 ti,nand-xfer-type = "prefetch-dma";
304 ti,nand-ecc-opt = "bch8";
305 ti,elm-id = <&elm>;
306 nand-bus-width = <16>;
307 gpmc,device-width = <2>;
308 gpmc,sync-clk-ps = <0>;
309 gpmc,cs-on-ns = <0>;
310 gpmc,cs-rd-off-ns = <80>;
311 gpmc,cs-wr-off-ns = <80>;
312 gpmc,adv-on-ns = <0>;
313 gpmc,adv-rd-off-ns = <60>;
314 gpmc,adv-wr-off-ns = <60>;
315 gpmc,we-on-ns = <10>;
316 gpmc,we-off-ns = <50>;
317 gpmc,oe-on-ns = <4>;
318 gpmc,oe-off-ns = <40>;
319 gpmc,access-ns = <40>;
320 gpmc,wr-access-ns = <80>;
321 gpmc,rd-cycle-ns = <80>;
322 gpmc,wr-cycle-ns = <80>;
323 gpmc,bus-turnaround-ns = <0>;
324 gpmc,cycle2cycle-delay-ns = <0>;
325 gpmc,clk-activation-ns = <0>;
326 gpmc,wr-data-mux-bus-ns = <0>;
328 /* All SPL-* partitions are sized to minimal length
330 * NAND flash this is equal to size of erase-block */
331 #address-cells = <1>;
332 #size-cells = <1>;
334 label = "NAND.SPL";
338 label = "NAND.SPL.backup1";
342 label = "NAND.SPL.backup2";
346 label = "NAND.SPL.backup3";
350 label = "NAND.u-boot-spl-os";
354 label = "NAND.u-boot";
358 label = "NAND.u-boot-env";
362 label = "NAND.u-boot-env.backup1";
366 label = "NAND.kernel";
370 label = "NAND.file-system";
396 pinctrl-names = "default";
397 pinctrl-0 = <&mmc1_pins_default>;
398 vmmc-supply = <&evm_3v3_sd>;
399 bus-width = <4>;
401 * SDCD signal is not being used here - using the fact that GPIO mode
404 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
405 max-frequency = <192000000>;
409 /* SW5-3 in ON position */
411 pinctrl-names = "default";
412 pinctrl-0 = <&mmc2_pins_default>;
413 bus-width = <8>;
414 non-removable;
415 max-frequency = <192000000>;
420 vmmc-supply = <&evm_3v6>;
421 vqmmc-supply = <&vmmcwl_fixed>;
422 bus-width = <4>;
423 cap-power-off-card;
424 keep-power-in-suspend;
425 non-removable;
426 pinctrl-names = "default", "hs", "sdr12", "sdr25";
427 pinctrl-0 = <&mmc4_pins_default>;
428 pinctrl-1 = <&mmc4_pins_default>;
429 pinctrl-2 = <&mmc4_pins_default>;
430 pinctrl-3 = <&mmc4_pins_default>;
431 #address-cells = <1>;
432 #size-cells = <0>;
436 interrupt-parent = <&gpio5>;
447 pinctrl-names = "default", "sleep", "active";
448 pinctrl-0 = <&dcan1_pins_sleep>;
449 pinctrl-1 = <&dcan1_pins_sleep>;
450 pinctrl-2 = <&dcan1_pins_default>;
456 spi-max-frequency = <76800000>;
459 spi-max-frequency = <76800000>;
461 spi-tx-bus-width = <1>;
462 spi-rx-bus-width = <4>;
463 #address-cells = <1>;
464 #size-cells = <1>;
488 label = "QSPI.u-boot";
492 label = "QSPI.u-boot-spl-os";
496 label = "QSPI.u-boot-env";
500 label = "QSPI.u-boot-env.backup1";
508 label = "QSPI.file-system";
523 remote-endpoint = <&tpd12s015_in>;
529 assigned-clocks = <&abe_dpll_sys_clk_mux>,
534 assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>;
535 assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <5644800>;
546 #sound-dai-cells = <0>;
548 assigned-clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>;
549 assigned-clock-parents = <&atl_clkin2_ck>;
553 op-mode = <0>; /* MCASP_IIS_MODE */
554 tdm-slots = <2>;
556 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
559 tx-num-evt = <32>;
560 rx-num-evt = <32>;