Lines Matching +full:32 +full:- +full:bit
1 // SPDX-License-Identifier: GPL-2.0
9 * Code supporting the Sable, Sable-Gamma, and Lynx systems.
40 /* Note mask bit is true for DISABLED irqs. */
43 void (*update_irq_hw)(unsigned long bit, unsigned long mask);
44 void (*ack_irq_hw)(unsigned long bit);
59 * 0-7 (char at 536)
60 * 8-15 (char at 53a)
61 * 16-23 (char at 53c)
65 * Bit Meaning Kernel IRQ
66 *------------------------------------------
69 * 2 TULIP (builtin) 32
77 *10 EISA irq 3 -
78 *11 EISA irq 4 -
80 *13 EISA irq 6 -
81 *14 EISA irq 7 -
86 *19 EISA irq 12 -
87 *20 EISA irq 13 -
90 *23 IIC -
94 sable_update_irq_hw(unsigned long bit, unsigned long mask) in sable_update_irq_hw() argument
98 if (bit >= 16) { in sable_update_irq_hw()
101 } else if (bit >= 8) { in sable_update_irq_hw()
110 sable_ack_irq_hw(unsigned long bit) in sable_ack_irq_hw() argument
114 if (bit >= 16) { in sable_ack_irq_hw()
116 val1 = 0xE0 | (bit - 16); in sable_ack_irq_hw()
118 } else if (bit >= 8) { in sable_ack_irq_hw()
120 val1 = 0xE0 | (bit - 8); in sable_ack_irq_hw()
124 val1 = 0xE0 | (bit - 0); in sable_ack_irq_hw()
134 -1, 6, -1, 8, 15, 12, 7, 9, /* pseudo PIC 0-7 */
135 -1, 16, 17, 18, 3, -1, 21, 22, /* pseudo PIC 8-15 */
136 -1, -1, -1, -1, -1, -1, -1, -1, /* pseudo EISA 0-7 */
137 -1, -1, -1, -1, -1, -1, -1, -1, /* pseudo EISA 8-15 */
138 2, 1, 0, 4, 5, -1, -1, -1, /* pseudo PCI */
139 -1, -1, -1, -1, -1, -1, -1, -1, /* */
140 -1, -1, -1, -1, -1, -1, -1, -1, /* */
141 -1, -1, -1, -1, -1, -1, -1, -1 /* */
144 34, 33, 32, 12, 35, 36, 1, 6, /* mask 0-7 */
145 3, 7, -1, -1, 5, -1, -1, 4, /* mask 8-15 */
146 9, 10, 11, -1, -1, 14, 15, -1, /* mask 16-23 */
147 -1, -1, -1, -1, -1, -1, -1, -1, /* */
148 -1, -1, -1, -1, -1, -1, -1, -1, /* */
149 -1, -1, -1, -1, -1, -1, -1, -1, /* */
150 -1, -1, -1, -1, -1, -1, -1, -1, /* */
151 -1, -1, -1, -1, -1, -1, -1, -1 /* */
153 -1,
161 outb(-1, 0x537); /* slave 0 */ in sable_init_irq()
162 outb(-1, 0x53b); /* slave 1 */ in sable_init_irq()
163 outb(-1, 0x53d); /* slave 2 */ in sable_init_irq()
178 * 2 PCI-EISA bridge
188 * above for PCI interrupts. The IRQ relates to which bit the interrupt
201 { 32+0, 32+0, 32+0, 32+0, 32+0}, /* IdSel 0, TULIP */ in sable_map_irq()
202 { 32+1, 32+1, 32+1, 32+1, 32+1}, /* IdSel 1, SCSI */ in sable_map_irq()
203 { -1, -1, -1, -1, -1}, /* IdSel 2, SIO */ in sable_map_irq()
204 { -1, -1, -1, -1, -1}, /* IdSel 3, none */ in sable_map_irq()
205 { -1, -1, -1, -1, -1}, /* IdSel 4, none */ in sable_map_irq()
206 { -1, -1, -1, -1, -1}, /* IdSel 5, none */ in sable_map_irq()
207 { 32+2, 32+2, 32+2, 32+2, 32+2}, /* IdSel 6, slot 0 */ in sable_map_irq()
208 { 32+3, 32+3, 32+3, 32+3, 32+3}, /* IdSel 7, slot 1 */ in sable_map_irq()
209 { 32+4, 32+4, 32+4, 32+4, 32+4} /* IdSel 8, slot 2 */ in sable_map_irq()
224 * Bit Meaning Kernel IRQ
225 *------------------------------------------
236 *10 EISA irq 3 -
237 *11 EISA irq 4 -
239 *13 EISA irq 6 -
240 *14 EISA irq 7 -
245 *19 EISA irq 12 -
249 *23 IIC -
250 *24 VGA (builtin) -
258 *32 PCI 0 slot 4 A primary bus 32
293 lynx_update_irq_hw(unsigned long bit, unsigned long mask) in lynx_update_irq_hw() argument
301 *(vulp)T2_AIR; /* re-read to force write */ in lynx_update_irq_hw()
309 lynx_ack_irq_hw(unsigned long bit) in lynx_ack_irq_hw() argument
311 *(vulp)T2_VAR = (u_long) bit; in lynx_ack_irq_hw()
318 -1, 6, -1, 8, 15, 12, 7, 9, /* pseudo PIC 0-7 */
319 -1, 16, 17, 18, 3, -1, 21, 22, /* pseudo PIC 8-15 */
320 -1, -1, -1, -1, -1, -1, -1, -1, /* pseudo */
321 -1, -1, -1, -1, 28, -1, -1, -1, /* pseudo */
322 32, 33, 34, 35, 36, 37, 38, 39, /* mask 32-39 */
323 40, 41, 42, 43, 44, 45, 46, 47, /* mask 40-47 */
324 48, 49, 50, 51, 52, 53, 54, 55, /* mask 48-55 */
325 56, 57, 58, 59, 60, 61, 62, 63 /* mask 56-63 */
328 -1, -1, -1, 12, -1, -1, 1, 6, /* mask 0-7 */
329 3, 7, -1, -1, 5, -1, -1, 4, /* mask 8-15 */
330 9, 10, 11, -1, -1, 14, 15, -1, /* mask 16-23 */
331 -1, -1, -1, -1, 28, -1, -1, -1, /* mask 24-31 */
332 32, 33, 34, 35, 36, 37, 38, 39, /* mask 32-39 */
333 40, 41, 42, 43, 44, 45, 46, 47, /* mask 40-47 */
334 48, 49, 50, 51, 52, 53, 54, 55, /* mask 48-55 */
335 56, 57, 58, 59, 60, 61, 62, 63 /* mask 56-63 */
337 -1,
357 * 2 PCI-EISA bridge
358 * 3 PCI-PCI bridge
359 * 4 NCR 810 (Demi-Lynx only)
383 { -1, -1, -1, -1, -1}, /* IdSel 13, PCEB */ in lynx_map_irq()
384 { -1, -1, -1, -1, -1}, /* IdSel 14, PPB */ in lynx_map_irq()
386 { -1, -1, -1, -1, -1}, /* IdSel 16, none */ in lynx_map_irq()
387 { 32, 32, 33, 34, 35}, /* IdSel 17, slot 4 */ in lynx_map_irq()
391 { -1, -1, -1, -1, -1}, /* IdSel 22, none */ in lynx_map_irq()
393 { -1, -1, -1, -1, -1}, /* IdSel 16 none */ in lynx_map_irq()
395 { -1, -1, -1, -1, -1}, /* IdSel 18 none */ in lynx_map_irq()
396 { -1, -1, -1, -1, -1}, /* IdSel 19 none */ in lynx_map_irq()
397 { -1, -1, -1, -1, -1}, /* IdSel 20 none */ in lynx_map_irq()
398 { -1, -1, -1, -1, -1}, /* IdSel 21 none */ in lynx_map_irq()
413 if (dev->bus->number == 0) { in lynx_swizzle()
414 slot = PCI_SLOT(dev->devfn); in lynx_swizzle()
416 /* Check for the built-in bridge */ in lynx_swizzle()
417 else if (PCI_SLOT(dev->bus->self->devfn) == 3) { in lynx_swizzle()
418 slot = PCI_SLOT(dev->devfn) + 11; in lynx_swizzle()
422 /* Must be a card-based bridge. */ in lynx_swizzle()
424 if (PCI_SLOT(dev->bus->self->devfn) == 3) { in lynx_swizzle()
425 slot = PCI_SLOT(dev->devfn) + 11; in lynx_swizzle()
431 dev = dev->bus->self; in lynx_swizzle()
433 slot = PCI_SLOT(dev->devfn); in lynx_swizzle()
434 } while (dev->bus->self); in lynx_swizzle()
448 unsigned long bit, mask; in sable_lynx_enable_irq() local
450 bit = sable_lynx_irq_swizzle->irq_to_mask[d->irq]; in sable_lynx_enable_irq()
452 mask = sable_lynx_irq_swizzle->shadow_mask &= ~(1UL << bit); in sable_lynx_enable_irq()
453 sable_lynx_irq_swizzle->update_irq_hw(bit, mask); in sable_lynx_enable_irq()
456 printk("%s: mask 0x%lx bit 0x%lx irq 0x%x\n", in sable_lynx_enable_irq()
457 __func__, mask, bit, irq); in sable_lynx_enable_irq()
464 unsigned long bit, mask; in sable_lynx_disable_irq() local
466 bit = sable_lynx_irq_swizzle->irq_to_mask[d->irq]; in sable_lynx_disable_irq()
468 mask = sable_lynx_irq_swizzle->shadow_mask |= 1UL << bit; in sable_lynx_disable_irq()
469 sable_lynx_irq_swizzle->update_irq_hw(bit, mask); in sable_lynx_disable_irq()
472 printk("%s: mask 0x%lx bit 0x%lx irq 0x%x\n", in sable_lynx_disable_irq()
473 __func__, mask, bit, irq); in sable_lynx_disable_irq()
480 unsigned long bit, mask; in sable_lynx_mask_and_ack_irq() local
482 bit = sable_lynx_irq_swizzle->irq_to_mask[d->irq]; in sable_lynx_mask_and_ack_irq()
484 mask = sable_lynx_irq_swizzle->shadow_mask |= 1UL << bit; in sable_lynx_mask_and_ack_irq()
485 sable_lynx_irq_swizzle->update_irq_hw(bit, mask); in sable_lynx_mask_and_ack_irq()
486 sable_lynx_irq_swizzle->ack_irq_hw(bit); in sable_lynx_mask_and_ack_irq()
502 so-called legacy IRQs for many common devices. */ in sable_lynx_srm_device_interrupt()
504 int bit, irq; in sable_lynx_srm_device_interrupt() local
506 bit = (vector - 0x800) >> 4; in sable_lynx_srm_device_interrupt()
507 irq = sable_lynx_irq_swizzle->mask_to_irq[bit]; in sable_lynx_srm_device_interrupt()
509 printk("%s: vector 0x%lx bit 0x%x irq 0x%x\n", in sable_lynx_srm_device_interrupt()
510 __func__, vector, bit, irq); in sable_lynx_srm_device_interrupt()
580 .vector_name = "Sable-Gamma",