Lines Matching +full:num +full:- +full:cs

5 - compatible :
6   - "fsl,imx1-cspi" for SPI compatible with the one integrated on i.MX1
7   - "fsl,imx21-cspi" for SPI compatible with the one integrated on i.MX21
8   - "fsl,imx27-cspi" for SPI compatible with the one integrated on i.MX27
9   - "fsl,imx31-cspi" for SPI compatible with the one integrated on i.MX31
10   - "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35
11   - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51
12   - "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc
13   - "fsl,imx8mq-ecspi" for SPI compatible with the one integrated on i.MX8M
14 - reg : Offset and length of the register set for the device
15 - interrupts : Should contain CSPI/eCSPI interrupt
16 - clocks : Clock specifiers for both ipg and per clocks.
17 - clock-names : Clock names should include both "ipg" and "per"
19 	Documentation/devicetree/bindings/clock/clock-bindings.txt
22 - cs-gpios : GPIOs to use as chip selects, see spi-bus.txt.  While the native chip
28 - num-cs :  Number of total chip selects, see spi-bus.txt.
29 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
31 - dma-names: DMA request names, if present, should include "tx" and "rx".
32 - fsl,spi-rdy-drctl: Integer, representing the value of DRCTL, the register
34 the SPI_READY mode-flag needs to be set too.
35 Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst).
38 - fsl,spi-num-chipselects : Contains the number of the chipselect
43 	#address-cells = <1>;
44 	#size-cells = <0>;
45 	compatible = "fsl,imx51-ecspi";
48 	cs-gpios = <&gpio3 24 0>, /* GPIO3_24 */
51 	dma-names = "rx", "tx";
52 	fsl,spi-rdy-drctl = <1>;