Lines Matching full:phy
1 Qualcomm QMP PHY controller
4 QMP phy controller supports physical layer functionality for a number of
9 "qcom,ipq8074-qmp-pcie-phy" for PCIe phy on IPQ8074
10 "qcom,msm8996-qmp-pcie-phy" for 14nm PCIe phy on msm8996,
11 "qcom,msm8996-qmp-usb3-phy" for 14nm USB3 phy on msm8996,
12 "qcom,msm8998-qmp-usb3-phy" for USB3 QMP V3 phy on msm8998,
13 "qcom,msm8998-qmp-ufs-phy" for UFS QMP phy on msm8998,
14 "qcom,msm8998-qmp-pcie-phy" for PCIe QMP phy on msm8998,
15 "qcom,sdm845-qmp-usb3-phy" for USB3 QMP V3 phy on sdm845,
16 "qcom,sdm845-qmp-usb3-uni-phy" for USB3 QMP V3 UNI phy on sdm845,
17 "qcom,sdm845-qmp-ufs-phy" for UFS QMP phy on sdm845.
20 - index 0: address and length of register set for PHY's common
23 "qcom,sdm845-qmp-usb3-phy" only).
26 - For "qcom,sdm845-qmp-usb3-phy":
37 - clock-names: "cfg_ahb" for phy config clock,
38 "aux" for phy aux clock,
40 "com_aux" for phy common block aux clock,
41 "ref_aux" for phy reference aux clock,
43 For "qcom,ipq8074-qmp-pcie-phy": no clocks are listed.
44 For "qcom,msm8996-qmp-pcie-phy" must contain:
46 For "qcom,msm8996-qmp-usb3-phy" must contain:
48 For "qcom,msm8998-qmp-usb3-phy" must contain:
50 For "qcom,msm8998-qmp-ufs-phy" must contain:
52 For "qcom,msm8998-qmp-pcie-phy" must contain:
54 For "qcom,sdm845-qmp-usb3-phy" must contain:
56 For "qcom,sdm845-qmp-usb3-uni-phy" must contain:
58 For "qcom,sdm845-qmp-ufs-phy" must contain:
63 - reset-names: "phy" for reset of phy block,
64 "common" for phy common block reset,
65 "cfg" for phy's ahb cfg block reset,
66 "ufsphy" for the PHY reset in the UFS controller.
68 For "qcom,ipq8074-qmp-pcie-phy" must contain:
69 "phy", "common".
70 For "qcom,msm8996-qmp-pcie-phy" must contain:
71 "phy", "common", "cfg".
72 For "qcom,msm8996-qmp-usb3-phy" must contain
73 "phy", "common".
74 For "qcom,msm8998-qmp-usb3-phy" must contain
75 "phy", "common".
76 For "qcom,msm8998-qmp-ufs-phy": must contain:
78 For "qcom,msm8998-qmp-pcie-phy" must contain:
79 "phy", "common".
80 For "qcom,sdm845-qmp-usb3-phy" must contain:
81 "phy", "common".
82 For "qcom,sdm845-qmp-usb3-uni-phy" must contain:
83 "phy", "common".
84 For "qcom,sdm845-qmp-ufs-phy": must contain:
87 - vdda-phy-supply: Phandle to a regulator supply to PHY core block.
88 - vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block.
95 - Each device node of QMP phy is required to have as many child nodes as
96 the number of lanes the PHY has.
99 - reg: list of offset and length pairs of register sets for PHY blocks -
101 - #phy-cells: must be 0
104 - reg: list of offset and length pairs of register sets for PHY blocks
109 - #phy-cells: must be 0
116 - clock-output-names: Name of the PHY clock that will be the parent for
118 For "qcom,ipq8074-qmp-pcie-phy":
123 - Phy pll outputs pipe clocks for pipe based PHYs. These clocks are then
127 "qcom,msm8996-qmp-pcie-phy"
134 phy@34000 {
135 compatible = "qcom,msm8996-qmp-pcie-phy";
146 vdda-phy-supply = <&pm8994_l28>;
152 reset-names = "phy", "common", "cfg";
159 #phy-cells = <0>;
173 phy@88eb000 {
174 compatible = "qcom,sdm845-qmp-usb3-uni-phy";
188 reset-names = "phy", "common";
196 #phy-cells = <0>;
203 phy@1d87000 {
204 compatible = "qcom,sdm845-qmp-ufs-phy";
220 #phy-cells = <0>;