Lines Matching +full:phy +full:- +full:mode
6 - compatible: may be compatible = "mediatek,mt7530"
8 - #address-cells: Must be 1.
9 - #size-cells: Must be 0.
10 - mediatek,mcm: Boolean; if defined, indicates that either MT7530 is the part
11 on multi-chip module belong to MT7623A has or the remotely standalone
16 - core-supply: Phandle to the regulator node necessary for the core power.
17 - io-supply: Phandle to the regulator node necessary for the I/O power.
18 See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt
23 - reset-gpios: Should be a gpio specifier for a reset line.
27 - resets : Phandle pointing to the system reset controller with
29 - reset-names : Should be set to "mcm".
33 - reg: Port address described must be 6 for CPU port and from 0 to 5 for
35 - phy-mode: String, must be either "trgmii" or "rgmii" for port labeled
39 1. GMAC5: GMAC5 can interface with another external MAC or PHY.
40 2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd GMAC
43 GMAC5 when the gpios for RGMII2 (GPIO 22-33) are not used and not
47 1. Port 5 is disabled and isolated: An external phy can interface to the 2nd
49 In the case of a build-in MT7530 switch, port 5 shares the RGMII bus with 2nd
50 GMAC and an optional external phy. Mind the GPIO/pinctl settings of the SOC!
51 2. Port 5 is muxed to PHY of port 0/4: Port 0/4 interfaces with 2nd GMAC.
52 It is a simple MAC to PHY interface, port 5 needs to be setup for xMII mode
54 3. Port 5 is muxed to GMAC5 and can interface to an external phy.
56 Only works on platform where external phy TX<->RX lines are swapped.
57 Like in the Ubiquiti ER-X-SFP.
61 Depending on how the external PHY is wired:
62 1. normal: The PHY can only connect to 2nd GMAC but not to the switch
63 2. swapped: RGMII TX, RX are swapped; external phy interface with the switch as
66 Based on the DT the port 5 mode is configured.
68 Driver tries to lookup the phy-handle of the 2nd GMAC of the master device.
69 When phy-handle matches PHY of port 0 or 4 then port 5 set-up as mode 2.
70 phy-mode must be set, see also example 2 below!
71 * mt7621: phy-mode = "rgmii-txid";
72 * mt7623: phy-mode = "rgmii";
83 #address-cells = <1>;
84 #size-cells = <0>;
87 core-supply = <&mt6323_vpa_reg>;
88 io-supply = <&mt6323_vemc3v3_reg>;
89 reset-gpios = <&pio 33 0>;
92 #address-cells = <1>;
93 #size-cells = <0>;
124 phy-mode = "trgmii";
125 fixed-link {
127 full-duplex;
134 Example 2: MT7621: Port 4 is WAN port: 2nd GMAC -> Port 5 -> PHY port 4.
138 compatible = "mediatek,eth-mac";
140 phy-mode = "rgmii";
142 fixed-link {
144 full-duplex;
150 compatible = "mediatek,eth-mac";
152 phy-mode = "rgmii-txid";
153 phy-handle = <&phy4>;
156 mdio: mdio-bus {
157 #address-cells = <1>;
158 #size-cells = <0>;
160 /* Internal phy */
161 phy4: ethernet-phy@4 {
167 #address-cells = <1>;
168 #size-cells = <0>;
170 pinctrl-names = "default";
174 reset-names = "mcm";
177 #address-cells = <1>;
178 #size-cells = <0>;
211 phy-mode = "rgmii";
213 fixed-link {
215 full-duplex;
224 Example 3: MT7621: Port 5 is connected to external PHY: Port 5 -> external PHY.
228 compatible = "mediatek,eth-mac";
230 phy-mode = "rgmii";
232 fixed-link {
234 full-duplex;
239 mdio: mdio-bus {
240 #address-cells = <1>;
241 #size-cells = <0>;
243 /* External phy */
244 ephy5: ethernet-phy@7 {
250 #address-cells = <1>;
251 #size-cells = <0>;
253 pinctrl-names = "default";
257 reset-names = "mcm";
260 #address-cells = <1>;
261 #size-cells = <0>;
291 phy-mode = "rgmii";
292 phy-handle = <&ephy5>;
299 phy-mode = "rgmii";
301 fixed-link {
303 full-duplex;