Lines Matching +full:nand +full:- +full:ecc +full:- +full:strength
1 Freescale's NAND flash controller (NFC)
3 This variant of the Freescale NAND flash controller (NFC) can be found on
7 - compatible: Should be set to "fsl,vf610-nfc".
8 - reg: address range of the NFC.
9 - interrupts: interrupt of the NFC.
10 - #address-cells: shall be set to 1. Encode the nand CS.
11 - #size-cells : shall be set to 0.
12 - assigned-clocks: main clock from the SoC, for Vybrid <&clks VF610_CLK_NFC>;
13 - assigned-clock-rates: The NAND bus timing is derived from this clock
14 rate and should not exceed maximum timing for any NAND memory chip
15 in a board stuffing. Typical NAND memory timings derived from this
17 there might be restrictions on maximum rates when using hardware ECC.
19 - #address-cells, #size-cells : Must be present if the device has sub-nodes
23 Children nodes represent the available nand chips. Currently the driver can
24 only handle one NAND chip.
27 - compatible: Should be set to "fsl,vf610-nfc-cs".
28 - nand-bus-width: see nand-controller.yaml
29 - nand-ecc-mode: see nand-controller.yaml
31 Required properties for hardware ECC:
32 - nand-ecc-strength: supported strengths are 24 and 32 bit (see nand-controller.yaml)
33 - nand-ecc-step-size: step size equals page size, currently only 2k pages are
35 - nand-on-flash-bbt: see nand-controller.yaml
39 nfc: nand@400e0000 {
40 compatible = "fsl,vf610-nfc";
41 #address-cells = <1>;
42 #size-cells = <0>;
46 clock-names = "nfc";
47 assigned-clocks = <&clks VF610_CLK_NFC>;
48 assigned-clock-rates = <33000000>;
50 nand@0 {
51 compatible = "fsl,vf610-nfc-nandcs";
53 nand-bus-width = <8>;
54 nand-ecc-mode = "hw";
55 nand-ecc-strength = <32>;
56 nand-ecc-step-size = <2048>;
57 nand-on-flash-bbt;