Lines Matching +full:nand +full:- +full:ecc +full:- +full:mode
1 Marvell NAND Flash Controller (NFC)
4 - compatible: can be one of the following:
5 * "marvell,armada-8k-nand-controller"
6 * "marvell,armada370-nand-controller"
7 * "marvell,pxa3xx-nand-controller"
8 * "marvell,armada-8k-nand" (deprecated)
9 * "marvell,armada370-nand" (deprecated)
10 * "marvell,pxa3xx-nand" (deprecated)
13 - reg: NAND flash controller memory area.
14 - #address-cells: shall be set to 1. Encode the NAND CS.
15 - #size-cells: shall be set to 0.
16 - interrupts: shall define the NAND controller interrupt.
17 - clocks: shall reference the NAND controller clocks, the second one is
19 - clock-names: mandatory if there is a second clock, in this case there
21 - marvell,system-controller: Set to retrieve the syscon node that handles
22 NAND controller related registers (only required with the
23 "marvell,armada-8k-nand[-controller]" compatibles).
26 - label: see partition.txt. New platforms shall omit this property.
27 - dmas: shall reference DMA channel associated to the NAND controller.
28 This property is only used with "marvell,pxa3xx-nand[-controller]"
30 - dma-names: shall be "rxtx".
31 This property is only used with "marvell,pxa3xx-nand[-controller]"
35 Children nodes represent the available NAND chips.
38 - reg: shall contain the native Chip Select ids (0-3).
39 - nand-rb: see nand-controller.yaml (0-1).
42 - marvell,nand-keep-config: orders the driver not to take the timings
45 - label: MTD name.
46 - nand-on-flash-bbt: see nand-controller.yaml.
47 - nand-ecc-mode: see nand-controller.yaml. Will use hardware ECC if not specified.
48 - nand-ecc-algo: see nand-controller.yaml. This property is essentially useful when
49 not using hardware ECC. Howerver, it may be added when using hardware
50 ECC for clarification but will be ignored by the driver because ECC
51 mode is chosen depending on the page size and the strength required by
52 the NAND chip. This value may be overwritten with nand-ecc-strength
54 - nand-ecc-strength: see nand-controller.yaml.
55 - nand-ecc-step-size: see nand-controller.yaml. Marvell's NAND flash controller does
56 use fixed strength (1-bit for Hamming, 16-bit for BCH), so the actual
59 patterns described in AN-379, "Marvell SoC NFC ECC".
61 See Documentation/devicetree/bindings/mtd/nand-controller.yaml for more details on
66 nand_controller: nand-controller@d0000 {
67 compatible = "marvell,armada370-nand-controller";
69 #address-cells = <1>;
70 #size-cells = <0>;
74 nand@0 {
76 label = "main-storage";
77 nand-rb = <0>;
78 nand-ecc-mode = "hw";
79 marvell,nand-keep-config;
80 nand-on-flash-bbt;
81 nand-ecc-strength = <4>;
82 nand-ecc-step-size = <512>;
85 compatible = "fixed-partitions";
86 #address-cells = <1>;
87 #size-cells = <1>;
98 Note on legacy bindings: One can find, in not-updated device trees,
101 called "nand" node (without clear controller/chip separation).
104 - marvell,nand-enable-arbiter: To enable the arbiter, all boards blindly
109 - num-cs: Number of chip-select lines to use, all boards blindly set 1
115 nand0: nand@43100000 {
116 compatible = "marvell,pxa3xx-nand";
120 dma-names = "rxtx";
121 #address-cells = <1>;
122 marvell,nand-keep-config;
123 marvell,nand-enable-arbiter;
124 num-cs = <1>;