Lines Matching full:interrupt

1 BCM2835 Top-Level ("ARMCTRL") Interrupt Controller
3 The BCM2835 contains a custom top-level interrupt controller, which supports
4 72 interrupt sources using a 2-level register scheme. The interrupt
8 The BCM2836 contains the same interrupt controller with the same
9 interrupts, but the per-CPU interrupt controller is the root, and an
10 interrupt there indicates that the ARMCTRL has an interrupt to handle.
17 - interrupt-controller : Identifies the node as an interrupt controller
18 - #interrupt-cells : Specifies the number of cells needed to encode an
19   interrupt source. The value shall be 2.
21   The 1st cell is the interrupt bank; 0 for interrupts in the "IRQ basic
25   The 2nd cell contains the interrupt number within the bank. Valid values
29 - interrupts : Specifies the interrupt on the parent for this interrupt
32 The interrupt sources are as follows:
72 27: DMA11-14 - shared interrupt for DMA 11 to 14
115 intc: interrupt-controller {
118 	interrupt-controller;
119 	#interrupt-cells = <2>;
123 intc: interrupt-controller {
126 	interrupt-controller;
127 	#interrupt-cells = <2>;
129 	interrupt-parent = <&local_intc>;