Lines Matching refs:bridges

61  * FPGA bridges may be actual hardware or soft logic on an FPGA.
62  * During Full Reconfiguration, hardware bridges between the host and FPGA
67    buses, eliminating the need to show the hardware FPGA bridges in the
111  1. Disable appropriate FPGA bridges.
113  3. Enable the FPGA bridges.
118 will disable the bridges.
145 FPGA region will be the child of one of the hardware bridges (the bridge that
151 These FPGA regions are children of FPGA bridges which are then children of the
160 FPGA Regions do not inherit their ancestor FPGA regions' bridges.  This prevents
161 shutting down bridges that are upstream from the other active regions while one
163 hardware bridges remain enabled.  The PR regions' bridges will be FPGA bridges
180 - fpga-bridges : should contain a list of phandles to FPGA Bridges that must be
182 	This property is optional if the FPGA Manager handles the bridges.
191 	bridges to successfully become enabled after the region has been
194 	bridges to successfully become disabled before the region has been
201 fpga_mgr is used to program the FPGA.  Two bridges are controlled during
204 fpga-bridges property.  During programming, these bridges are disabled, the
206 specified in the region.  If FPGA programming succeeds, the bridges are
208 are then populated.  If FPGA programming fails, the bridges are left disabled
259 			fpga-bridges = <&fpga_bridge1>;
291    bridges behind the scenes.  No FPGA Bridge devices are needed for full
294  * Full reconfiguration with hardware bridges
295    In this case, there are hardware bridges between the processor and FPGA that
299    register access to the FPGA.  Additional bridges may be listed in a
300    fpga-bridges property in the FPGA region or in the device tree overlay.
302  * Partial reconfiguration with bridges in the FPGA
305    bridges need to exist in the FPGA that can gate the buses going to each FPGA
308    PRR's with FPGA bridges.  The device tree should have a FPGA region for each
331 they are specified in the FPGA Region by the "fpga-bridges" property.  During
332 FPGA programming, the FPGA Region will disable the bridges that are in its
333 "fpga-bridges" list and will re-enable them after FPGA programming has