Lines Matching full:ecc
1 Altera SoCFPGA ECC Manager
2 This driver uses the EDAC framework to implement the SOCFPGA ECC Manager.
3 The ECC Manager counts and corrects single bit errors and counts/handles
6 Cyclone5 and Arria5 ECC Manager
8 - compatible : Should be "altr,socfpga-ecc-manager"
15 L2 Cache ECC
17 - compatible : Should be "altr,socfpga-l2-ecc"
18 - reg : Address and size for ECC error interrupt clear registers.
22 On Chip RAM ECC
24 - compatible : Should be "altr,socfpga-ocram-ecc"
25 - reg : Address and size for ECC error interrupt clear registers.
33 compatible = "altr,socfpga-ecc-manager";
38 l2-ecc@ffd08140 {
39 compatible = "altr,socfpga-l2-ecc";
44 ocram-ecc@ffd08144 {
45 compatible = "altr,socfpga-ocram-ecc";
52 Arria10 SoCFPGA ECC Manager
53 The Arria10 SoC ECC Manager handles the IRQs for each peripheral
58 - compatible : Should be "altr,socfpga-a10-ecc-manager"
60 containing the ECC manager registers.
65 - interrupt-controller : boolean indicator that ECC Manager is an interrupt controller
71 L2 Cache ECC
73 - compatible : Should be "altr,socfpga-a10-l2-ecc"
74 - reg : Address and size for ECC error interrupt clear registers.
78 On-Chip RAM ECC
80 - compatible : Should be "altr,socfpga-a10-ocram-ecc"
81 - reg : Address and size for ECC block registers.
85 Ethernet FIFO ECC
87 - compatible : Should be "altr,socfpga-eth-mac-ecc"
88 - reg : Address and size for ECC block registers.
89 - altr,ecc-parent : phandle to parent Ethernet node.
93 NAND FIFO ECC
95 - compatible : Should be "altr,socfpga-nand-ecc"
96 - reg : Address and size for ECC block registers.
97 - altr,ecc-parent : phandle to parent NAND node.
101 DMA FIFO ECC
103 - compatible : Should be "altr,socfpga-dma-ecc"
104 - reg : Address and size for ECC block registers.
105 - altr,ecc-parent : phandle to parent DMA node.
109 USB FIFO ECC
111 - compatible : Should be "altr,socfpga-usb-ecc"
112 - reg : Address and size for ECC block registers.
113 - altr,ecc-parent : phandle to parent USB node.
117 QSPI FIFO ECC
119 - compatible : Should be "altr,socfpga-qspi-ecc"
120 - reg : Address and size for ECC block registers.
121 - altr,ecc-parent : phandle to parent QSPI node.
125 SDMMC FIFO ECC
127 - compatible : Should be "altr,socfpga-sdmmc-ecc"
128 - reg : Address and size for ECC block registers.
129 - altr,ecc-parent : phandle to parent SD/MMC node.
137 compatible = "altr,socfpga-a10-ecc-manager";
147 l2-ecc@ffd06010 {
148 compatible = "altr,socfpga-a10-l2-ecc";
154 ocram-ecc@ff8c3000 {
155 compatible = "altr,socfpga-a10-ocram-ecc";
161 emac0-rx-ecc@ff8c0800 {
162 compatible = "altr,socfpga-eth-mac-ecc";
164 altr,ecc-parent = <&gmac0>;
169 emac0-tx-ecc@ff8c0c00 {
170 compatible = "altr,socfpga-eth-mac-ecc";
172 altr,ecc-parent = <&gmac0>;
177 nand-buf-ecc@ff8c2000 {
178 compatible = "altr,socfpga-nand-ecc";
180 altr,ecc-parent = <&nand>;
185 nand-rd-ecc@ff8c2400 {
186 compatible = "altr,socfpga-nand-ecc";
188 altr,ecc-parent = <&nand>;
193 nand-wr-ecc@ff8c2800 {
194 compatible = "altr,socfpga-nand-ecc";
196 altr,ecc-parent = <&nand>;
201 dma-ecc@ff8c8000 {
202 compatible = "altr,socfpga-dma-ecc";
204 altr,ecc-parent = <&pdma>;
208 usb0-ecc@ff8c8800 {
209 compatible = "altr,socfpga-usb-ecc";
211 altr,ecc-parent = <&usb0>;
216 qspi-ecc@ff8c8400 {
217 compatible = "altr,socfpga-qspi-ecc";
219 altr,ecc-parent = <&qspi>;
224 sdmmc-ecc@ff8c2c00 {
225 compatible = "altr,socfpga-sdmmc-ecc";
227 altr,ecc-parent = <&mmc>;
235 Stratix10 SoCFPGA ECC Manager (ARM64)
236 The Stratix10 SoC ECC Manager handles the IRQs for each peripheral
237 in a shared register similar to the Arria10. However, Stratix10 ECC
244 - compatible : Should be "altr,socfpga-s10-ecc-manager"
246 containing the ECC manager registers.
248 - interrupt-controller : boolean indicator that ECC Manager is an interrupt controller
256 SDRAM ECC
261 On-Chip RAM ECC
263 - compatible : Should be "altr,socfpga-s10-ocram-ecc"
264 - reg : Address and size for ECC block registers.
265 - altr,ecc-parent : phandle to parent OCRAM node.
268 Ethernet FIFO ECC
270 - compatible : Should be "altr,socfpga-s10-eth-mac-ecc"
271 - reg : Address and size for ECC block registers.
272 - altr,ecc-parent : phandle to parent Ethernet node.
275 NAND FIFO ECC
277 - compatible : Should be "altr,socfpga-s10-nand-ecc"
278 - reg : Address and size for ECC block registers.
279 - altr,ecc-parent : phandle to parent NAND node.
282 DMA FIFO ECC
284 - compatible : Should be "altr,socfpga-s10-dma-ecc"
285 - reg : Address and size for ECC block registers.
286 - altr,ecc-parent : phandle to parent DMA node.
289 USB FIFO ECC
291 - compatible : Should be "altr,socfpga-s10-usb-ecc"
292 - reg : Address and size for ECC block registers.
293 - altr,ecc-parent : phandle to parent USB node.
296 SDMMC FIFO ECC
298 - compatible : Should be "altr,socfpga-s10-sdmmc-ecc"
299 - reg : Address and size for ECC block registers.
300 - altr,ecc-parent : phandle to parent SD/MMC node.
307 compatible = "altr,socfpga-s10-ecc-manager";
321 ocram-ecc@ff8cc000 {
322 compatible = "altr,socfpga-s10-ocram-ecc";
324 altr,ecc-parent = <&ocram>;
328 emac0-rx-ecc@ff8c0000 {
329 compatible = "altr,socfpga-s10-eth-mac-ecc";
331 altr,ecc-parent = <&gmac0>;
335 emac0-tx-ecc@ff8c0400 {
336 compatible = "altr,socfpga-s10-eth-mac-ecc";
338 altr,ecc-parent = <&gmac0>;
342 nand-buf-ecc@ff8c8000 {
343 compatible = "altr,socfpga-s10-nand-ecc";
345 altr,ecc-parent = <&nand>;
349 nand-rd-ecc@ff8c8400 {
350 compatible = "altr,socfpga-s10-nand-ecc";
352 altr,ecc-parent = <&nand>;
356 nand-wr-ecc@ff8c8800 {
357 compatible = "altr,socfpga-s10-nand-ecc";
359 altr,ecc-parent = <&nand>;
363 dma-ecc@ff8c9000 {
364 compatible = "altr,socfpga-s10-dma-ecc";
366 altr,ecc-parent = <&pdma>;
369 usb0-ecc@ff8c4000 {
370 compatible = "altr,socfpga-s10-usb-ecc";
372 altr,ecc-parent = <&usb0>;
376 sdmmc-ecc@ff8c8c00 {
377 compatible = "altr,socfpga-s10-sdmmc-ecc";
379 altr,ecc-parent = <&mmc>;