Lines Matching +full:non +full:- +full:secure

1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Mark Rutland <mark.rutland@arm.com>
11   - Will Deacon <will.deacon@arm.com>
16   representation in the device tree should be done as under:-
21       - enum:
22           - apm,potenza-pmu
23           - arm,armv8-pmuv3
24           - arm,cortex-a73-pmu
25           - arm,cortex-a72-pmu
26           - arm,cortex-a57-pmu
27           - arm,cortex-a53-pmu
28           - arm,cortex-a35-pmu
29           - arm,cortex-a17-pmu
30           - arm,cortex-a15-pmu
31           - arm,cortex-a12-pmu
32           - arm,cortex-a9-pmu
33           - arm,cortex-a8-pmu
34           - arm,cortex-a7-pmu
35           - arm,cortex-a5-pmu
36           - arm,arm11mpcore-pmu
37           - arm,arm1176-pmu
38           - arm,arm1136-pmu
39           - brcm,vulcan-pmu
40           - cavium,thunder-pmu
41           - qcom,scorpion-pmu
42           - qcom,scorpion-mp-pmu
43           - qcom,krait-pmu
47     description: 1 per-cpu interrupt (PPI) or 1 interrupt per core.
49   interrupt-affinity:
50     $ref: /schemas/types.yaml#/definitions/phandle-array
61       the interrupt-affinity property shouldn't be present).
66   qcom,no-pc-write:
71   secure-reg-access:
74       Indicates that the ARMv7 Secure Debug Enable Register
76       any setup required that is only possible in ARMv7 secure
81       not valid for non-ARMv7 CPUs or ARMv7 CPUs booting Linux
82       in Non-secure state.
85   - compatible