Lines Matching +full:a +full:- +full:f0 +full:- +full:9
4 Contact: tpmdd-devel@lists.sf.net
5 Description: The device/ directory under a specific TPM instance exposes
12 Contact: tpmdd-devel@lists.sf.net
13 Description: The "active" property prints a '1' if the TPM chip is accepting
16 visible to the OS, but will only accept a restricted set of
24 Contact: tpmdd-devel@lists.sf.net
32 Contact: tpmdd-devel@lists.sf.net
41 Manufacturer is a hex dump of the 4 byte manufacturer info
42 space in a TPM. TCG version shows the TCG TPM spec level that
49 Contact: tpmdd-devel@lists.sf.net
50 Description: The "durations" property shows the 3 vendor-specific values
51 used to wait for a short, medium and long TPM command. All
54 any longer than necessary before starting to poll for a
64 Durations can be modified in the case where a buggy chip
72 Contact: tpmdd-devel@lists.sf.net
73 Description: The "enabled" property prints a '1' if the TPM chip is enabled,
75 may be visible but produce a '0' after some operation that
81 Contact: tpmdd-devel@lists.sf.net
82 Description: The "owned" property produces a '1' if the TPM_TakeOwnership
83 ordinal has been executed successfully in the chip. A '0'
89 Contact: tpmdd-devel@lists.sf.net
93 for a snapshot in time.
97 PCR-00: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75
98 PCR-01: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75
99 PCR-02: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75
100 PCR-03: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75
101 PCR-04: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75
104 The number of PCRs and hex bytes needed to represent a PCR
106 1.2 chips, PCRs represent SHA-1 hashes, which are 20 bytes
112 Contact: tpmdd-devel@lists.sf.net
118 making it unaccessible. The public endorsement key is gener-
131 3A B2 92 0C A4 9B 2A 83 EB 5C 12 85 04 48 A0 B6
132 1E E4 81 84 CE B2 F2 45 1C F0 85 99 61 02 4D EB
134 D7 0E 7D CA 41 BF 43 07 65 86 3C 8C 13 7A D0 8B
138 6F 78 44 DA 57 43 69 EE 76 6C 38 8A E9 8E A3 F0
141 10 AD 94 14 65 F9 6A 17 78 BD 16 53 84 30 BF 70
142 E0 DC 65 FD 3C C6 B0 1E BF B9 C1 B5 6C EF B1 3A
143 F8 28 05 83 62 26 11 DC B4 6B 5A 97 FF 32 26 B6
144 F7 02 71 CF 15 AE 16 DD D1 C1 8E A8 CF 9B 50 7B
145 C3 91 FF 44 1E CF 7C 39 FE 17 77 21 20 BD CE 9B
153 Parameters, a byte string of 3 u32 values:
164 Contact: tpmdd-devel@lists.sf.net
165 Description: The "temp_deactivated" property returns a '1' if the chip has
167 cycle. Whether a warm boot (reboot) will clear a TPM chip
168 from a temp_deactivated state is platform specific.
173 Contact: tpmdd-devel@lists.sf.net
174 Description: The "timeouts" property shows the 4 vendor-specific values
183 The four timeout values are shown in usecs, with a trailing