Lines Matching +full:secure +full:- +full:regions
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
7 #include <linux/dma-mapping.h>
19 #include <nd-core.h>
31 * BUS0: Interleaved PMEM regions, and aliasing with BLK regions
33 * (a) (b) DIMM BLK-REGION
34 * +----------+--------------+----------+---------+
35 * +------+ | blk2.0 | pm0.0 | blk2.1 | pm1.0 | 0 region2
36 * | imc0 +--+- - - - - region0 - - - -+----------+ +
37 * +--+---+ | blk3.0 | pm0.0 | blk3.1 | pm1.0 | 1 region3
38 * | +----------+--------------v----------v v
39 * +--+---+ | |
41 * +--+---+ | |
42 * | +-------------------------^----------^ ^
43 * +--+---+ | blk4.0 | pm1.0 | 2 region4
44 * | imc1 +--+-------------------------+----------+ +
45 * +------+ | blk5.0 | pm1.0 | 3 region5
46 * +-------------------------+----------+-+-------+
48 * +--+---+
50 * +--+---+ (Hotplug DIMM)
51 * | +----------------------------------------------+
52 * +--+---+ | blk6.0/pm7.0 | 4 region6/7
53 * | imc0 +--+----------------------------------------------+
54 * +------+
63 * REGION0 SPA-range. REGION0 spans dimm0 and dimm1. PMEM namespace
68 * DIMMs. "pm0.0", "blk2.0" and "blk3.0" are free-form readable
81 * Note, that BLK namespaces need not be contiguous in DPA-space, and
87 * +---------------------+
88 * |---------------------|
90 * |---------------------|
91 * +---------------------+
93 * *) A NFIT-table may describe a simple system-physical-address range
237 struct device *dev = &t->pdev.dev; in nd_intel_test_get_fw_info()
238 struct nfit_test_fw *fw = &t->fw[idx]; in nd_intel_test_get_fw_info()
244 return -EINVAL; in nd_intel_test_get_fw_info()
246 nd_cmd->status = 0; in nd_intel_test_get_fw_info()
247 nd_cmd->storage_size = INTEL_FW_STORAGE_SIZE; in nd_intel_test_get_fw_info()
248 nd_cmd->max_send_len = INTEL_FW_MAX_SEND_LEN; in nd_intel_test_get_fw_info()
249 nd_cmd->query_interval = INTEL_FW_QUERY_INTERVAL; in nd_intel_test_get_fw_info()
250 nd_cmd->max_query_time = INTEL_FW_QUERY_MAX_TIME; in nd_intel_test_get_fw_info()
251 nd_cmd->update_cap = 0; in nd_intel_test_get_fw_info()
252 nd_cmd->fis_version = INTEL_FW_FIS_VERSION; in nd_intel_test_get_fw_info()
253 nd_cmd->run_version = 0; in nd_intel_test_get_fw_info()
254 nd_cmd->updated_version = fw->version; in nd_intel_test_get_fw_info()
263 struct device *dev = &t->pdev.dev; in nd_intel_test_start_update()
264 struct nfit_test_fw *fw = &t->fw[idx]; in nd_intel_test_start_update()
270 return -EINVAL; in nd_intel_test_start_update()
272 if (fw->state != FW_STATE_NEW) { in nd_intel_test_start_update()
274 nd_cmd->status = 0x10007; in nd_intel_test_start_update()
278 fw->state = FW_STATE_IN_PROGRESS; in nd_intel_test_start_update()
279 fw->context++; in nd_intel_test_start_update()
280 fw->size_received = 0; in nd_intel_test_start_update()
281 nd_cmd->status = 0; in nd_intel_test_start_update()
282 nd_cmd->context = fw->context; in nd_intel_test_start_update()
284 dev_dbg(dev, "%s: context issued: %#x\n", __func__, nd_cmd->context); in nd_intel_test_start_update()
293 struct device *dev = &t->pdev.dev; in nd_intel_test_send_data()
294 struct nfit_test_fw *fw = &t->fw[idx]; in nd_intel_test_send_data()
295 u32 *status = (u32 *)&nd_cmd->data[nd_cmd->length]; in nd_intel_test_send_data()
301 return -EINVAL; in nd_intel_test_send_data()
304 dev_dbg(dev, "%s: cmd->status: %#x\n", __func__, *status); in nd_intel_test_send_data()
305 dev_dbg(dev, "%s: cmd->data[0]: %#x\n", __func__, nd_cmd->data[0]); in nd_intel_test_send_data()
306 dev_dbg(dev, "%s: cmd->data[%u]: %#x\n", __func__, nd_cmd->length-1, in nd_intel_test_send_data()
307 nd_cmd->data[nd_cmd->length-1]); in nd_intel_test_send_data()
309 if (fw->state != FW_STATE_IN_PROGRESS) { in nd_intel_test_send_data()
315 if (nd_cmd->context != fw->context) { in nd_intel_test_send_data()
317 __func__, nd_cmd->context, fw->context); in nd_intel_test_send_data()
326 if (nd_cmd->offset + nd_cmd->length > INTEL_FW_STORAGE_SIZE || in nd_intel_test_send_data()
327 nd_cmd->length > INTEL_FW_MAX_SEND_LEN) { in nd_intel_test_send_data()
333 fw->size_received += nd_cmd->length; in nd_intel_test_send_data()
335 __func__, nd_cmd->length, fw->size_received); in nd_intel_test_send_data()
344 struct device *dev = &t->pdev.dev; in nd_intel_test_finish_fw()
345 struct nfit_test_fw *fw = &t->fw[idx]; in nd_intel_test_finish_fw()
350 if (fw->state == FW_STATE_UPDATED) { in nd_intel_test_finish_fw()
352 nd_cmd->status = 0x20007; in nd_intel_test_finish_fw()
357 __func__, nd_cmd->context, nd_cmd->ctrl_flags); in nd_intel_test_finish_fw()
359 switch (nd_cmd->ctrl_flags) { in nd_intel_test_finish_fw()
361 if (nd_cmd->context != fw->context) { in nd_intel_test_finish_fw()
363 __func__, nd_cmd->context, in nd_intel_test_finish_fw()
364 fw->context); in nd_intel_test_finish_fw()
365 nd_cmd->status = 0x10007; in nd_intel_test_finish_fw()
368 nd_cmd->status = 0; in nd_intel_test_finish_fw()
369 fw->state = FW_STATE_VERIFY; in nd_intel_test_finish_fw()
371 fw->end_time = jiffies + HZ; in nd_intel_test_finish_fw()
375 fw->size_received = 0; in nd_intel_test_finish_fw()
377 nd_cmd->status = 0x40007; in nd_intel_test_finish_fw()
378 fw->state = FW_STATE_NEW; in nd_intel_test_finish_fw()
384 __func__, nd_cmd->ctrl_flags); in nd_intel_test_finish_fw()
385 return -EINVAL; in nd_intel_test_finish_fw()
395 struct device *dev = &t->pdev.dev; in nd_intel_test_finish_query()
396 struct nfit_test_fw *fw = &t->fw[idx]; in nd_intel_test_finish_query()
402 return -EINVAL; in nd_intel_test_finish_query()
404 if (nd_cmd->context != fw->context) { in nd_intel_test_finish_query()
406 __func__, nd_cmd->context, fw->context); in nd_intel_test_finish_query()
407 nd_cmd->status = 0x10007; in nd_intel_test_finish_query()
411 dev_dbg(dev, "%s context: %#x\n", __func__, nd_cmd->context); in nd_intel_test_finish_query()
413 switch (fw->state) { in nd_intel_test_finish_query()
415 nd_cmd->updated_fw_rev = 0; in nd_intel_test_finish_query()
416 nd_cmd->status = 0; in nd_intel_test_finish_query()
422 nd_cmd->status = 0x40007; in nd_intel_test_finish_query()
423 nd_cmd->updated_fw_rev = 0; in nd_intel_test_finish_query()
428 if (time_is_after_jiffies64(fw->end_time)) { in nd_intel_test_finish_query()
429 nd_cmd->updated_fw_rev = 0; in nd_intel_test_finish_query()
430 nd_cmd->status = 0x20007; in nd_intel_test_finish_query()
435 fw->state = FW_STATE_UPDATED; in nd_intel_test_finish_query()
436 fw->missed_activate = false; in nd_intel_test_finish_query()
439 nd_cmd->status = 0; in nd_intel_test_finish_query()
441 fw->version = nd_cmd->updated_fw_rev = in nd_intel_test_finish_query()
447 return -EINVAL; in nd_intel_test_finish_query()
457 return -EINVAL; in nfit_test_cmd_get_config_size()
459 nd_cmd->status = 0; in nfit_test_cmd_get_config_size()
460 nd_cmd->config_size = LABEL_SIZE; in nfit_test_cmd_get_config_size()
461 nd_cmd->max_xfer = SZ_4K; in nfit_test_cmd_get_config_size()
469 unsigned int len, offset = nd_cmd->in_offset; in nfit_test_cmd_get_config_data()
473 return -EINVAL; in nfit_test_cmd_get_config_data()
475 return -EINVAL; in nfit_test_cmd_get_config_data()
476 if (nd_cmd->in_length + sizeof(*nd_cmd) > buf_len) in nfit_test_cmd_get_config_data()
477 return -EINVAL; in nfit_test_cmd_get_config_data()
479 nd_cmd->status = 0; in nfit_test_cmd_get_config_data()
480 len = min(nd_cmd->in_length, LABEL_SIZE - offset); in nfit_test_cmd_get_config_data()
481 memcpy(nd_cmd->out_buf, label + offset, len); in nfit_test_cmd_get_config_data()
482 rc = buf_len - sizeof(*nd_cmd) - len; in nfit_test_cmd_get_config_data()
490 unsigned int len, offset = nd_cmd->in_offset; in nfit_test_cmd_set_config_data()
495 return -EINVAL; in nfit_test_cmd_set_config_data()
497 return -EINVAL; in nfit_test_cmd_set_config_data()
498 if (nd_cmd->in_length + sizeof(*nd_cmd) + 4 > buf_len) in nfit_test_cmd_set_config_data()
499 return -EINVAL; in nfit_test_cmd_set_config_data()
501 status = (void *)nd_cmd + nd_cmd->in_length + sizeof(*nd_cmd); in nfit_test_cmd_set_config_data()
503 len = min(nd_cmd->in_length, LABEL_SIZE - offset); in nfit_test_cmd_set_config_data()
504 memcpy(label + offset, nd_cmd->in_buf, len); in nfit_test_cmd_set_config_data()
505 rc = buf_len - sizeof(*nd_cmd) - (len + 4); in nfit_test_cmd_set_config_data()
518 return -EINVAL; in nfit_test_cmd_ars_cap()
523 nd_cmd->max_ars_out = sizeof(struct nd_cmd_ars_status) in nfit_test_cmd_ars_cap()
525 nd_cmd->status = (ND_ARS_PERSISTENT | ND_ARS_VOLATILE) << 16; in nfit_test_cmd_ars_cap()
526 nd_cmd->clear_err_unit = NFIT_TEST_CLEAR_ERR_UNIT; in nfit_test_cmd_ars_cap()
537 u64 end = addr + len - 1; in post_ars_status()
540 ars_state->deadline = jiffies + 1*HZ; in post_ars_status()
541 ars_status = ars_state->ars_status; in post_ars_status()
542 ars_status->status = 0; in post_ars_status()
543 ars_status->address = addr; in post_ars_status()
544 ars_status->length = len; in post_ars_status()
545 ars_status->type = ND_ARS_PERSISTENT; in post_ars_status()
547 spin_lock(&badrange->lock); in post_ars_status()
548 list_for_each_entry(be, &badrange->list, list) { in post_ars_status()
549 u64 be_end = be->start + be->length - 1; in post_ars_status()
553 if (be_end < addr || be->start > end) in post_ars_status()
556 rstart = (be->start < addr) ? addr : be->start; in post_ars_status()
558 ars_record = &ars_status->records[i]; in post_ars_status()
559 ars_record->handle = 0; in post_ars_status()
560 ars_record->err_address = rstart; in post_ars_status()
561 ars_record->length = rend - rstart + 1; in post_ars_status()
564 spin_unlock(&badrange->lock); in post_ars_status()
565 ars_status->num_records = i; in post_ars_status()
566 ars_status->out_length = sizeof(struct nd_cmd_ars_status) in post_ars_status()
576 return -EINVAL; in nfit_test_cmd_ars_start()
578 spin_lock(&ars_state->lock); in nfit_test_cmd_ars_start()
579 if (time_before(jiffies, ars_state->deadline)) { in nfit_test_cmd_ars_start()
580 ars_start->status = NFIT_ARS_START_BUSY; in nfit_test_cmd_ars_start()
581 *cmd_rc = -EBUSY; in nfit_test_cmd_ars_start()
583 ars_start->status = 0; in nfit_test_cmd_ars_start()
584 ars_start->scrub_time = 1; in nfit_test_cmd_ars_start()
585 post_ars_status(ars_state, &t->badrange, ars_start->address, in nfit_test_cmd_ars_start()
586 ars_start->length); in nfit_test_cmd_ars_start()
589 spin_unlock(&ars_state->lock); in nfit_test_cmd_ars_start()
598 if (buf_len < ars_state->ars_status->out_length) in nfit_test_cmd_ars_status()
599 return -EINVAL; in nfit_test_cmd_ars_status()
601 spin_lock(&ars_state->lock); in nfit_test_cmd_ars_status()
602 if (time_before(jiffies, ars_state->deadline)) { in nfit_test_cmd_ars_status()
604 ars_status->status = NFIT_ARS_STATUS_BUSY; in nfit_test_cmd_ars_status()
605 ars_status->out_length = sizeof(*ars_status); in nfit_test_cmd_ars_status()
606 *cmd_rc = -EBUSY; in nfit_test_cmd_ars_status()
608 memcpy(ars_status, ars_state->ars_status, in nfit_test_cmd_ars_status()
609 ars_state->ars_status->out_length); in nfit_test_cmd_ars_status()
612 spin_unlock(&ars_state->lock); in nfit_test_cmd_ars_status()
620 const u64 mask = NFIT_TEST_CLEAR_ERR_UNIT - 1; in nfit_test_cmd_clear_error()
622 return -EINVAL; in nfit_test_cmd_clear_error()
624 if ((clear_err->address & mask) || (clear_err->length & mask)) in nfit_test_cmd_clear_error()
625 return -EINVAL; in nfit_test_cmd_clear_error()
627 badrange_forget(&t->badrange, clear_err->address, clear_err->length); in nfit_test_cmd_clear_error()
628 clear_err->status = 0; in nfit_test_cmd_clear_error()
629 clear_err->cleared = clear_err->length; in nfit_test_cmd_clear_error()
641 return !strncmp(dev->kobj.name, "region", 6); in is_region_device()
654 ndr_end = nd_region->ndr_start + nd_region->ndr_size; in nfit_test_search_region_spa()
656 if (ctx->addr >= nd_region->ndr_start && ctx->addr < ndr_end) { in nfit_test_search_region_spa()
657 ctx->region = nd_region; in nfit_test_search_region_spa()
672 .addr = spa->spa, in nfit_test_search_spa()
677 ret = device_for_each_child(&bus->dev, &ctx, in nfit_test_search_spa()
681 return -ENODEV; in nfit_test_search_spa()
685 dpa = ctx.addr - nd_region->ndr_start; in nfit_test_search_spa()
690 nd_mapping = &nd_region->mapping[nd_region->ndr_mappings - 1]; in nfit_test_search_spa()
691 nvdimm = nd_mapping->nvdimm; in nfit_test_search_spa()
693 spa->devices[0].nfit_device_handle = handle[nvdimm->id]; in nfit_test_search_spa()
694 spa->num_nvdimms = 1; in nfit_test_search_spa()
695 spa->devices[0].dpa = dpa; in nfit_test_search_spa()
703 if (buf_len < spa->translate_length) in nfit_test_cmd_translate_spa()
704 return -EINVAL; in nfit_test_cmd_translate_spa()
706 if (nfit_test_search_spa(bus, spa) < 0 || !spa->num_nvdimms) in nfit_test_cmd_translate_spa()
707 spa->status = 2; in nfit_test_cmd_translate_spa()
716 return -EINVAL; in nfit_test_cmd_smart()
727 return -EINVAL; in nfit_test_cmd_smart_threshold()
737 __func__, thresh->alarm_control, thresh->spares, in smart_notify()
738 smart->spares, thresh->media_temperature, in smart_notify()
739 smart->media_temperature, thresh->ctrl_temperature, in smart_notify()
740 smart->ctrl_temperature); in smart_notify()
741 if (((thresh->alarm_control & ND_INTEL_SMART_SPARE_TRIP) in smart_notify()
742 && smart->spares in smart_notify()
743 <= thresh->spares) in smart_notify()
744 || ((thresh->alarm_control & ND_INTEL_SMART_TEMP_TRIP) in smart_notify()
745 && smart->media_temperature in smart_notify()
746 >= thresh->media_temperature) in smart_notify()
747 || ((thresh->alarm_control & ND_INTEL_SMART_CTEMP_TRIP) in smart_notify()
748 && smart->ctrl_temperature in smart_notify()
749 >= thresh->ctrl_temperature) in smart_notify()
750 || (smart->health != ND_INTEL_SMART_NON_CRITICAL_HEALTH) in smart_notify()
751 || (smart->shutdown_state != 0)) { in smart_notify()
767 size = sizeof(*in) - 4; in nfit_test_cmd_smart_set_threshold()
769 return -EINVAL; in nfit_test_cmd_smart_set_threshold()
770 memcpy(thresh->data, in, size); in nfit_test_cmd_smart_set_threshold()
771 in->status = 0; in nfit_test_cmd_smart_set_threshold()
785 return -EINVAL; in nfit_test_cmd_smart_inject()
787 if (inj->flags & ND_INTEL_SMART_INJECT_MTEMP) { in nfit_test_cmd_smart_inject()
788 if (inj->mtemp_enable) in nfit_test_cmd_smart_inject()
789 smart->media_temperature = inj->media_temperature; in nfit_test_cmd_smart_inject()
791 smart->media_temperature = smart_def.media_temperature; in nfit_test_cmd_smart_inject()
793 if (inj->flags & ND_INTEL_SMART_INJECT_SPARE) { in nfit_test_cmd_smart_inject()
794 if (inj->spare_enable) in nfit_test_cmd_smart_inject()
795 smart->spares = inj->spares; in nfit_test_cmd_smart_inject()
797 smart->spares = smart_def.spares; in nfit_test_cmd_smart_inject()
799 if (inj->flags & ND_INTEL_SMART_INJECT_FATAL) { in nfit_test_cmd_smart_inject()
800 if (inj->fatal_enable) in nfit_test_cmd_smart_inject()
801 smart->health = ND_INTEL_SMART_FATAL_HEALTH; in nfit_test_cmd_smart_inject()
803 smart->health = ND_INTEL_SMART_NON_CRITICAL_HEALTH; in nfit_test_cmd_smart_inject()
805 if (inj->flags & ND_INTEL_SMART_INJECT_SHUTDOWN) { in nfit_test_cmd_smart_inject()
806 if (inj->unsafe_shutdown_enable) { in nfit_test_cmd_smart_inject()
807 smart->shutdown_state = 1; in nfit_test_cmd_smart_inject()
808 smart->shutdown_count++; in nfit_test_cmd_smart_inject()
810 smart->shutdown_state = 0; in nfit_test_cmd_smart_inject()
812 inj->status = 0; in nfit_test_cmd_smart_inject()
822 __acpi_nfit_notify(&t->pdev.dev, t, NFIT_NOTIFY_UC_MEMORY_ERROR); in uc_error_notify()
831 rc = -EINVAL; in nfit_test_cmd_ars_error_inject()
835 if (err_inj->err_inj_spa_range_length <= 0) { in nfit_test_cmd_ars_error_inject()
836 rc = -EINVAL; in nfit_test_cmd_ars_error_inject()
840 rc = badrange_add(&t->badrange, err_inj->err_inj_spa_range_base, in nfit_test_cmd_ars_error_inject()
841 err_inj->err_inj_spa_range_length); in nfit_test_cmd_ars_error_inject()
845 if (err_inj->err_inj_options & (1 << ND_ARS_ERR_INJ_OPT_NOTIFY)) in nfit_test_cmd_ars_error_inject()
846 queue_work(nfit_wq, &t->work); in nfit_test_cmd_ars_error_inject()
848 err_inj->status = 0; in nfit_test_cmd_ars_error_inject()
852 err_inj->status = NFIT_ARS_INJECT_INVALID; in nfit_test_cmd_ars_error_inject()
862 rc = -EINVAL; in nfit_test_cmd_ars_inject_clear()
866 if (err_clr->err_inj_clr_spa_range_length <= 0) { in nfit_test_cmd_ars_inject_clear()
867 rc = -EINVAL; in nfit_test_cmd_ars_inject_clear()
871 badrange_forget(&t->badrange, err_clr->err_inj_clr_spa_range_base, in nfit_test_cmd_ars_inject_clear()
872 err_clr->err_inj_clr_spa_range_length); in nfit_test_cmd_ars_inject_clear()
874 err_clr->status = 0; in nfit_test_cmd_ars_inject_clear()
878 err_clr->status = NFIT_ARS_INJECT_INVALID; in nfit_test_cmd_ars_inject_clear()
890 err_stat->status = 0; in nfit_test_cmd_ars_inject_status()
891 spin_lock(&t->badrange.lock); in nfit_test_cmd_ars_inject_status()
892 list_for_each_entry(be, &t->badrange.list, list) { in nfit_test_cmd_ars_inject_status()
893 err_stat->record[i].err_inj_stat_spa_range_base = be->start; in nfit_test_cmd_ars_inject_status()
894 err_stat->record[i].err_inj_stat_spa_range_length = be->length; in nfit_test_cmd_ars_inject_status()
899 spin_unlock(&t->badrange.lock); in nfit_test_cmd_ars_inject_status()
900 err_stat->inj_err_rec_count = i; in nfit_test_cmd_ars_inject_status()
908 struct device *dev = &t->pdev.dev; in nd_intel_test_cmd_set_lss_status()
911 return -EINVAL; in nd_intel_test_cmd_set_lss_status()
913 switch (nd_cmd->enable) { in nd_intel_test_cmd_set_lss_status()
915 nd_cmd->status = 0; in nd_intel_test_cmd_set_lss_status()
920 nd_cmd->status = 0; in nd_intel_test_cmd_set_lss_status()
925 dev_warn(dev, "Unknown enable value: %#x\n", nd_cmd->enable); in nd_intel_test_cmd_set_lss_status()
926 nd_cmd->status = 0x3; in nd_intel_test_cmd_set_lss_status()
939 return -EIO; in override_return_code()
948 struct device *dev = &t->pdev.dev; in nd_intel_test_cmd_security_status()
951 nd_cmd->status = 0; in nd_intel_test_cmd_security_status()
952 nd_cmd->state = sec->state; in nd_intel_test_cmd_security_status()
953 nd_cmd->extended_state = sec->ext_state; in nd_intel_test_cmd_security_status()
954 dev_dbg(dev, "security state (%#x) returned\n", nd_cmd->state); in nd_intel_test_cmd_security_status()
963 struct device *dev = &t->pdev.dev; in nd_intel_test_cmd_unlock_unit()
966 if (!(sec->state & ND_INTEL_SEC_STATE_LOCKED) || in nd_intel_test_cmd_unlock_unit()
967 (sec->state & ND_INTEL_SEC_STATE_FROZEN)) { in nd_intel_test_cmd_unlock_unit()
968 nd_cmd->status = ND_INTEL_STATUS_INVALID_STATE; in nd_intel_test_cmd_unlock_unit()
970 sec->state); in nd_intel_test_cmd_unlock_unit()
971 } else if (memcmp(nd_cmd->passphrase, sec->passphrase, in nd_intel_test_cmd_unlock_unit()
973 nd_cmd->status = ND_INTEL_STATUS_INVALID_PASS; in nd_intel_test_cmd_unlock_unit()
976 nd_cmd->status = 0; in nd_intel_test_cmd_unlock_unit()
977 sec->state = ND_INTEL_SEC_STATE_ENABLED; in nd_intel_test_cmd_unlock_unit()
981 dev_dbg(dev, "unlocking status returned: %#x\n", nd_cmd->status); in nd_intel_test_cmd_unlock_unit()
989 struct device *dev = &t->pdev.dev; in nd_intel_test_cmd_set_pass()
992 if (sec->state & ND_INTEL_SEC_STATE_FROZEN) { in nd_intel_test_cmd_set_pass()
993 nd_cmd->status = ND_INTEL_STATUS_INVALID_STATE; in nd_intel_test_cmd_set_pass()
995 } else if (memcmp(nd_cmd->old_pass, sec->passphrase, in nd_intel_test_cmd_set_pass()
997 nd_cmd->status = ND_INTEL_STATUS_INVALID_PASS; in nd_intel_test_cmd_set_pass()
1000 memcpy(sec->passphrase, nd_cmd->new_pass, in nd_intel_test_cmd_set_pass()
1002 sec->state |= ND_INTEL_SEC_STATE_ENABLED; in nd_intel_test_cmd_set_pass()
1003 nd_cmd->status = 0; in nd_intel_test_cmd_set_pass()
1014 struct device *dev = &t->pdev.dev; in nd_intel_test_cmd_freeze_lock()
1017 if (!(sec->state & ND_INTEL_SEC_STATE_ENABLED)) { in nd_intel_test_cmd_freeze_lock()
1018 nd_cmd->status = ND_INTEL_STATUS_INVALID_STATE; in nd_intel_test_cmd_freeze_lock()
1021 sec->state |= ND_INTEL_SEC_STATE_FROZEN; in nd_intel_test_cmd_freeze_lock()
1022 nd_cmd->status = 0; in nd_intel_test_cmd_freeze_lock()
1033 struct device *dev = &t->pdev.dev; in nd_intel_test_cmd_disable_pass()
1036 if (!(sec->state & ND_INTEL_SEC_STATE_ENABLED) || in nd_intel_test_cmd_disable_pass()
1037 (sec->state & ND_INTEL_SEC_STATE_FROZEN)) { in nd_intel_test_cmd_disable_pass()
1038 nd_cmd->status = ND_INTEL_STATUS_INVALID_STATE; in nd_intel_test_cmd_disable_pass()
1040 } else if (memcmp(nd_cmd->passphrase, sec->passphrase, in nd_intel_test_cmd_disable_pass()
1042 nd_cmd->status = ND_INTEL_STATUS_INVALID_PASS; in nd_intel_test_cmd_disable_pass()
1045 memset(sec->passphrase, 0, ND_INTEL_PASSPHRASE_SIZE); in nd_intel_test_cmd_disable_pass()
1046 sec->state = 0; in nd_intel_test_cmd_disable_pass()
1057 struct device *dev = &t->pdev.dev; in nd_intel_test_cmd_secure_erase()
1060 if (sec->state & ND_INTEL_SEC_STATE_FROZEN) { in nd_intel_test_cmd_secure_erase()
1061 nd_cmd->status = ND_INTEL_STATUS_INVALID_STATE; in nd_intel_test_cmd_secure_erase()
1062 dev_dbg(dev, "secure erase: wrong security state\n"); in nd_intel_test_cmd_secure_erase()
1063 } else if (memcmp(nd_cmd->passphrase, sec->passphrase, in nd_intel_test_cmd_secure_erase()
1065 nd_cmd->status = ND_INTEL_STATUS_INVALID_PASS; in nd_intel_test_cmd_secure_erase()
1066 dev_dbg(dev, "secure erase: wrong passphrase\n"); in nd_intel_test_cmd_secure_erase()
1068 if (!(sec->state & ND_INTEL_SEC_STATE_ENABLED) in nd_intel_test_cmd_secure_erase()
1069 && (memcmp(nd_cmd->passphrase, zero_key, in nd_intel_test_cmd_secure_erase()
1074 memset(sec->passphrase, 0, ND_INTEL_PASSPHRASE_SIZE); in nd_intel_test_cmd_secure_erase()
1075 memset(sec->master_passphrase, 0, ND_INTEL_PASSPHRASE_SIZE); in nd_intel_test_cmd_secure_erase()
1076 sec->state = 0; in nd_intel_test_cmd_secure_erase()
1077 sec->ext_state = ND_INTEL_SEC_ESTATE_ENABLED; in nd_intel_test_cmd_secure_erase()
1078 dev_dbg(dev, "secure erase: done\n"); in nd_intel_test_cmd_secure_erase()
1088 struct device *dev = &t->pdev.dev; in nd_intel_test_cmd_overwrite()
1091 if ((sec->state & ND_INTEL_SEC_STATE_ENABLED) && in nd_intel_test_cmd_overwrite()
1092 memcmp(nd_cmd->passphrase, sec->passphrase, in nd_intel_test_cmd_overwrite()
1094 nd_cmd->status = ND_INTEL_STATUS_INVALID_PASS; in nd_intel_test_cmd_overwrite()
1099 sec->old_state = sec->state; in nd_intel_test_cmd_overwrite()
1100 sec->state = ND_INTEL_SEC_STATE_OVERWRITE; in nd_intel_test_cmd_overwrite()
1102 sec->overwrite_end_time = get_jiffies_64() + 5 * HZ; in nd_intel_test_cmd_overwrite()
1111 struct device *dev = &t->pdev.dev; in nd_intel_test_cmd_query_overwrite()
1114 if (!(sec->state & ND_INTEL_SEC_STATE_OVERWRITE)) { in nd_intel_test_cmd_query_overwrite()
1115 nd_cmd->status = ND_INTEL_STATUS_OQUERY_SEQUENCE_ERR; in nd_intel_test_cmd_query_overwrite()
1119 if (time_is_before_jiffies64(sec->overwrite_end_time)) { in nd_intel_test_cmd_query_overwrite()
1120 sec->overwrite_end_time = 0; in nd_intel_test_cmd_query_overwrite()
1121 sec->state = sec->old_state; in nd_intel_test_cmd_query_overwrite()
1122 sec->old_state = 0; in nd_intel_test_cmd_query_overwrite()
1123 sec->ext_state = ND_INTEL_SEC_ESTATE_ENABLED; in nd_intel_test_cmd_query_overwrite()
1126 nd_cmd->status = ND_INTEL_STATUS_OQUERY_INPROGRESS; in nd_intel_test_cmd_query_overwrite()
1134 struct device *dev = &t->pdev.dev; in nd_intel_test_cmd_master_set_pass()
1137 if (!(sec->ext_state & ND_INTEL_SEC_ESTATE_ENABLED)) { in nd_intel_test_cmd_master_set_pass()
1138 nd_cmd->status = ND_INTEL_STATUS_NOT_SUPPORTED; in nd_intel_test_cmd_master_set_pass()
1140 } else if (sec->ext_state & ND_INTEL_SEC_ESTATE_PLIMIT) { in nd_intel_test_cmd_master_set_pass()
1141 nd_cmd->status = ND_INTEL_STATUS_INVALID_STATE; in nd_intel_test_cmd_master_set_pass()
1143 } else if (memcmp(nd_cmd->old_pass, sec->master_passphrase, in nd_intel_test_cmd_master_set_pass()
1145 nd_cmd->status = ND_INTEL_STATUS_INVALID_PASS; in nd_intel_test_cmd_master_set_pass()
1148 memcpy(sec->master_passphrase, nd_cmd->new_pass, in nd_intel_test_cmd_master_set_pass()
1150 sec->ext_state = ND_INTEL_SEC_ESTATE_ENABLED; in nd_intel_test_cmd_master_set_pass()
1161 struct device *dev = &t->pdev.dev; in nd_intel_test_cmd_master_secure_erase()
1164 if (!(sec->ext_state & ND_INTEL_SEC_ESTATE_ENABLED)) { in nd_intel_test_cmd_master_secure_erase()
1165 nd_cmd->status = ND_INTEL_STATUS_NOT_SUPPORTED; in nd_intel_test_cmd_master_secure_erase()
1166 dev_dbg(dev, "master secure erase: in wrong state\n"); in nd_intel_test_cmd_master_secure_erase()
1167 } else if (sec->ext_state & ND_INTEL_SEC_ESTATE_PLIMIT) { in nd_intel_test_cmd_master_secure_erase()
1168 nd_cmd->status = ND_INTEL_STATUS_INVALID_STATE; in nd_intel_test_cmd_master_secure_erase()
1169 dev_dbg(dev, "master secure erase: in wrong security state\n"); in nd_intel_test_cmd_master_secure_erase()
1170 } else if (memcmp(nd_cmd->passphrase, sec->master_passphrase, in nd_intel_test_cmd_master_secure_erase()
1172 nd_cmd->status = ND_INTEL_STATUS_INVALID_PASS; in nd_intel_test_cmd_master_secure_erase()
1173 dev_dbg(dev, "master secure erase: wrong passphrase\n"); in nd_intel_test_cmd_master_secure_erase()
1176 sec->ext_state = ND_INTEL_SEC_ESTATE_ENABLED; in nd_intel_test_cmd_master_secure_erase()
1177 memset(sec->passphrase, 0, ND_INTEL_PASSPHRASE_SIZE); in nd_intel_test_cmd_master_secure_erase()
1178 sec->state = 0; in nd_intel_test_cmd_master_secure_erase()
1179 dev_dbg(dev, "master secure erase: done\n"); in nd_intel_test_cmd_master_secure_erase()
1196 struct nfit_test_fw *fw = &t->fw[i]; in nvdimm_bus_intel_fw_activate_businfo()
1198 if (fw->armed) in nvdimm_bus_intel_fw_activate_businfo()
1245 dev_dbg(&t->pdev.dev, "status: %d\n", status); in nvdimm_bus_intel_fw_activate()
1246 nd_cmd->status = status; in nvdimm_bus_intel_fw_activate()
1252 struct nfit_test_fw *fw = &t->fw[i]; in nvdimm_bus_intel_fw_activate()
1254 if (!fw->armed) in nvdimm_bus_intel_fw_activate()
1256 if (fw->state != FW_STATE_UPDATED) in nvdimm_bus_intel_fw_activate()
1257 fw->missed_activate = true; in nvdimm_bus_intel_fw_activate()
1259 fw->state = FW_STATE_NEW; in nvdimm_bus_intel_fw_activate()
1260 fw->armed = false; in nvdimm_bus_intel_fw_activate()
1261 fw->last_activate = last_activate; in nvdimm_bus_intel_fw_activate()
1272 struct nfit_test_fw *fw = &t->fw[dimm]; in nd_intel_test_cmd_fw_activate_dimminfo()
1281 else if (fw->armed) in nd_intel_test_cmd_fw_activate_dimminfo()
1287 if (last_activate && fw->last_activate == last_activate && in nd_intel_test_cmd_fw_activate_dimminfo()
1289 if (fw->missed_activate) in nd_intel_test_cmd_fw_activate_dimminfo()
1307 struct nfit_test_fw *fw = &t->fw[dimm]; in nd_intel_test_cmd_fw_activate_arm()
1309 fw->armed = nd_cmd->activate_arm == ND_INTEL_DIMM_FWA_ARM; in nd_intel_test_cmd_fw_activate_arm()
1310 nd_cmd->status = 0; in nd_intel_test_cmd_fw_activate_arm()
1318 /* lookup per-dimm data */ in get_dimm()
1320 if (__to_nfit_memdev(nfit_mem)->device_handle == handle[i]) in get_dimm()
1323 return -ENXIO; in get_dimm()
1338 len = pkg->nd_size_in; in nfit_ctl_dbg()
1339 family = pkg->nd_family; in nfit_ctl_dbg()
1340 buf = pkg->nd_payload; in nfit_ctl_dbg()
1341 func = pkg->nd_command; in nfit_ctl_dbg()
1343 dev_dbg(&t->pdev.dev, "%s family: %d cmd: %d: func: %d input length: %d\n", in nfit_ctl_dbg()
1370 return -ENOTTY; in nfit_test_ctl()
1375 buf_len = call_pkg->nd_size_in + call_pkg->nd_size_out; in nfit_test_ctl()
1376 buf = (void *) call_pkg->nd_payload; in nfit_test_ctl()
1377 func = call_pkg->nd_command; in nfit_test_ctl()
1378 if (call_pkg->nd_family != nfit_mem->family) in nfit_test_ctl()
1379 return -ENOTTY; in nfit_test_ctl()
1385 dev_WARN_ONCE(&t->pdev.dev, 1, in nfit_test_ctl()
1387 return -EINVAL; in nfit_test_ctl()
1465 &t->smart[i]); in nfit_test_ctl()
1470 &t->smart_threshold[i]); in nfit_test_ctl()
1475 &t->smart_threshold[i], in nfit_test_ctl()
1476 &t->smart[i], in nfit_test_ctl()
1477 &t->pdev.dev, t->dimm_dev[i]); in nfit_test_ctl()
1482 &t->smart_threshold[i], in nfit_test_ctl()
1483 &t->smart[i], in nfit_test_ctl()
1484 &t->pdev.dev, t->dimm_dev[i]); in nfit_test_ctl()
1487 return -ENOTTY; in nfit_test_ctl()
1493 || !test_bit(func, &nfit_mem->dsm_mask)) in nfit_test_ctl()
1494 return -ENOTTY; in nfit_test_ctl()
1506 t->label[i - t->dcr_idx]); in nfit_test_ctl()
1510 t->label[i - t->dcr_idx]); in nfit_test_ctl()
1513 return -ENOTTY; in nfit_test_ctl()
1517 struct ars_state *ars_state = &t->ars_state; in nfit_test_ctl()
1521 return -ENOTTY; in nfit_test_ctl()
1523 if (cmd == ND_CMD_CALL && call_pkg->nd_family in nfit_test_ctl()
1525 func = call_pkg->nd_command; in nfit_test_ctl()
1526 buf_len = call_pkg->nd_size_in + call_pkg->nd_size_out; in nfit_test_ctl()
1527 buf = (void *) call_pkg->nd_payload; in nfit_test_ctl()
1532 acpi_desc->nvdimm_bus, buf, buf_len); in nfit_test_ctl()
1547 return -ENOTTY; in nfit_test_ctl()
1549 } else if (cmd == ND_CMD_CALL && call_pkg->nd_family in nfit_test_ctl()
1551 func = call_pkg->nd_command; in nfit_test_ctl()
1552 buf_len = call_pkg->nd_size_in + call_pkg->nd_size_out; in nfit_test_ctl()
1553 buf = (void *) call_pkg->nd_payload; in nfit_test_ctl()
1565 return -ENOTTY; in nfit_test_ctl()
1568 return -ENOTTY; in nfit_test_ctl()
1570 if (!nd_desc || !test_bit(cmd, &nd_desc->cmd_mask)) in nfit_test_ctl()
1571 return -ENOTTY; in nfit_test_ctl()
1589 return -ENOTTY; in nfit_test_ctl()
1604 list_del(&nfit_res->list); in release_nfit_res()
1607 if (resource_size(&nfit_res->res) >= DIMM_SIZE) in release_nfit_res()
1608 gen_pool_free(nfit_pool, nfit_res->res.start, in release_nfit_res()
1609 resource_size(&nfit_res->res)); in release_nfit_res()
1610 vfree(nfit_res->buf); in release_nfit_res()
1617 struct device *dev = &t->pdev.dev; in __test_alloc()
1627 INIT_LIST_HEAD(&nfit_res->list); in __test_alloc()
1629 nfit_res->dev = dev; in __test_alloc()
1630 nfit_res->buf = buf; in __test_alloc()
1631 nfit_res->res.start = *dma; in __test_alloc()
1632 nfit_res->res.end = *dma + size - 1; in __test_alloc()
1633 nfit_res->res.name = "NFIT"; in __test_alloc()
1634 spin_lock_init(&nfit_res->lock); in __test_alloc()
1635 INIT_LIST_HEAD(&nfit_res->requests); in __test_alloc()
1637 list_add(&nfit_res->list, &t->resources); in __test_alloc()
1640 return nfit_res->buf; in __test_alloc()
1676 list_for_each_entry(n, &t->resources, list) { in nfit_test_lookup()
1677 if (addr >= n->res.start && (addr < n->res.start in nfit_test_lookup()
1678 + resource_size(&n->res))) { in nfit_test_lookup()
1681 } else if (addr >= (unsigned long) n->buf in nfit_test_lookup()
1682 && (addr < (unsigned long) n->buf in nfit_test_lookup()
1683 + resource_size(&n->res))) { in nfit_test_lookup()
1699 ars_state->ars_status = devm_kzalloc(dev, in ars_state_init()
1701 if (!ars_state->ars_status) in ars_state_init()
1702 return -ENOMEM; in ars_state_init()
1703 spin_lock_init(&ars_state->lock); in ars_state_init()
1712 for (i = 0; i < t->num_dcr; i++) in put_dimms()
1713 if (t->dimm_dev[i]) in put_dimms()
1714 device_unregister(t->dimm_dev[i]); in put_dimms()
1724 return -ENXIO; in dimm_name_to_id()
1806 sec->state = ND_INTEL_SEC_STATE_ENABLED | ND_INTEL_SEC_STATE_LOCKED; in lock_dimm_store()
1832 if (devm_add_action_or_reset(&t->pdev.dev, put_dimms, t)) in nfit_test_dimm_init()
1833 return -ENOMEM; in nfit_test_dimm_init()
1834 for (i = 0; i < t->num_dcr; i++) { in nfit_test_dimm_init()
1835 t->dimm_dev[i] = device_create_with_groups(nfit_test_dimm, in nfit_test_dimm_init()
1836 &t->pdev.dev, 0, NULL, in nfit_test_dimm_init()
1838 "test_dimm%d", i + t->dcr_idx); in nfit_test_dimm_init()
1839 if (!t->dimm_dev[i]) in nfit_test_dimm_init()
1840 return -ENOMEM; in nfit_test_dimm_init()
1849 for (i = 0; i < t->num_dcr; i++) { in security_init()
1852 sec->ext_state = ND_INTEL_SEC_ESTATE_ENABLED; in security_init()
1867 for (i = 0; i < t->num_dcr; i++) { in smart_init()
1868 memcpy(&t->smart[i], &smart_def, sizeof(smart_def)); in smart_init()
1869 memcpy(&t->smart_threshold[i], &smart_t_data, in smart_init()
1877 return sizeof(*spa) - 8; in sizeof_spa()
1894 t->nfit_buf = test_alloc(t, nfit_size, &t->nfit_dma); in nfit_test0_alloc()
1895 if (!t->nfit_buf) in nfit_test0_alloc()
1896 return -ENOMEM; in nfit_test0_alloc()
1897 t->nfit_size = nfit_size; in nfit_test0_alloc()
1899 t->spa_set[0] = test_alloc(t, SPA0_SIZE, &t->spa_set_dma[0]); in nfit_test0_alloc()
1900 if (!t->spa_set[0]) in nfit_test0_alloc()
1901 return -ENOMEM; in nfit_test0_alloc()
1903 t->spa_set[1] = test_alloc(t, SPA1_SIZE, &t->spa_set_dma[1]); in nfit_test0_alloc()
1904 if (!t->spa_set[1]) in nfit_test0_alloc()
1905 return -ENOMEM; in nfit_test0_alloc()
1907 t->spa_set[2] = test_alloc(t, SPA0_SIZE, &t->spa_set_dma[2]); in nfit_test0_alloc()
1908 if (!t->spa_set[2]) in nfit_test0_alloc()
1909 return -ENOMEM; in nfit_test0_alloc()
1911 for (i = 0; i < t->num_dcr; i++) { in nfit_test0_alloc()
1912 t->dimm[i] = test_alloc(t, DIMM_SIZE, &t->dimm_dma[i]); in nfit_test0_alloc()
1913 if (!t->dimm[i]) in nfit_test0_alloc()
1914 return -ENOMEM; in nfit_test0_alloc()
1916 t->label[i] = test_alloc(t, LABEL_SIZE, &t->label_dma[i]); in nfit_test0_alloc()
1917 if (!t->label[i]) in nfit_test0_alloc()
1918 return -ENOMEM; in nfit_test0_alloc()
1919 sprintf(t->label[i], "label%d", i); in nfit_test0_alloc()
1921 t->flush[i] = test_alloc(t, max(PAGE_SIZE, in nfit_test0_alloc()
1923 &t->flush_dma[i]); in nfit_test0_alloc()
1924 if (!t->flush[i]) in nfit_test0_alloc()
1925 return -ENOMEM; in nfit_test0_alloc()
1928 for (i = 0; i < t->num_dcr; i++) { in nfit_test0_alloc()
1929 t->dcr[i] = test_alloc(t, LABEL_SIZE, &t->dcr_dma[i]); in nfit_test0_alloc()
1930 if (!t->dcr[i]) in nfit_test0_alloc()
1931 return -ENOMEM; in nfit_test0_alloc()
1934 t->_fit = test_alloc(t, sizeof(union acpi_object **), &t->_fit_dma); in nfit_test0_alloc()
1935 if (!t->_fit) in nfit_test0_alloc()
1936 return -ENOMEM; in nfit_test0_alloc()
1939 return -ENOMEM; in nfit_test0_alloc()
1942 return ars_state_init(&t->pdev.dev, &t->ars_state); in nfit_test0_alloc()
1953 t->nfit_buf = test_alloc(t, nfit_size, &t->nfit_dma); in nfit_test1_alloc()
1954 if (!t->nfit_buf) in nfit_test1_alloc()
1955 return -ENOMEM; in nfit_test1_alloc()
1956 t->nfit_size = nfit_size; in nfit_test1_alloc()
1958 t->spa_set[0] = test_alloc(t, SPA2_SIZE, &t->spa_set_dma[0]); in nfit_test1_alloc()
1959 if (!t->spa_set[0]) in nfit_test1_alloc()
1960 return -ENOMEM; in nfit_test1_alloc()
1962 for (i = 0; i < t->num_dcr; i++) { in nfit_test1_alloc()
1963 t->label[i] = test_alloc(t, LABEL_SIZE, &t->label_dma[i]); in nfit_test1_alloc()
1964 if (!t->label[i]) in nfit_test1_alloc()
1965 return -ENOMEM; in nfit_test1_alloc()
1966 sprintf(t->label[i], "label%d", i); in nfit_test1_alloc()
1969 t->spa_set[1] = test_alloc(t, SPA_VCD_SIZE, &t->spa_set_dma[1]); in nfit_test1_alloc()
1970 if (!t->spa_set[1]) in nfit_test1_alloc()
1971 return -ENOMEM; in nfit_test1_alloc()
1974 return -ENOMEM; in nfit_test1_alloc()
1976 return ars_state_init(&t->pdev.dev, &t->ars_state); in nfit_test1_alloc()
1981 dcr->vendor_id = 0xabcd; in dcr_common_init()
1982 dcr->device_id = 0; in dcr_common_init()
1983 dcr->revision_id = 1; in dcr_common_init()
1984 dcr->valid_fields = 1; in dcr_common_init()
1985 dcr->manufacturing_location = 0xa; in dcr_common_init()
1986 dcr->manufacturing_date = cpu_to_be16(2016); in dcr_common_init()
1995 void *nfit_buf = t->nfit_buf; in nfit_test0_setup()
2006 * does not actually alias the related block-data-window in nfit_test0_setup()
2007 * regions) in nfit_test0_setup()
2010 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS; in nfit_test0_setup()
2011 spa->header.length = sizeof_spa(spa); in nfit_test0_setup()
2012 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16); in nfit_test0_setup()
2013 spa->range_index = 0+1; in nfit_test0_setup()
2014 spa->address = t->spa_set_dma[0]; in nfit_test0_setup()
2015 spa->length = SPA0_SIZE; in nfit_test0_setup()
2016 offset += spa->header.length; in nfit_test0_setup()
2020 * does not actually alias the related block-data-window in nfit_test0_setup()
2021 * regions) in nfit_test0_setup()
2024 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS; in nfit_test0_setup()
2025 spa->header.length = sizeof_spa(spa); in nfit_test0_setup()
2026 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16); in nfit_test0_setup()
2027 spa->range_index = 1+1; in nfit_test0_setup()
2028 spa->address = t->spa_set_dma[1]; in nfit_test0_setup()
2029 spa->length = SPA1_SIZE; in nfit_test0_setup()
2030 offset += spa->header.length; in nfit_test0_setup()
2034 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS; in nfit_test0_setup()
2035 spa->header.length = sizeof_spa(spa); in nfit_test0_setup()
2036 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16); in nfit_test0_setup()
2037 spa->range_index = 2+1; in nfit_test0_setup()
2038 spa->address = t->dcr_dma[0]; in nfit_test0_setup()
2039 spa->length = DCR_SIZE; in nfit_test0_setup()
2040 offset += spa->header.length; in nfit_test0_setup()
2044 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS; in nfit_test0_setup()
2045 spa->header.length = sizeof_spa(spa); in nfit_test0_setup()
2046 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16); in nfit_test0_setup()
2047 spa->range_index = 3+1; in nfit_test0_setup()
2048 spa->address = t->dcr_dma[1]; in nfit_test0_setup()
2049 spa->length = DCR_SIZE; in nfit_test0_setup()
2050 offset += spa->header.length; in nfit_test0_setup()
2054 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS; in nfit_test0_setup()
2055 spa->header.length = sizeof_spa(spa); in nfit_test0_setup()
2056 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16); in nfit_test0_setup()
2057 spa->range_index = 4+1; in nfit_test0_setup()
2058 spa->address = t->dcr_dma[2]; in nfit_test0_setup()
2059 spa->length = DCR_SIZE; in nfit_test0_setup()
2060 offset += spa->header.length; in nfit_test0_setup()
2064 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS; in nfit_test0_setup()
2065 spa->header.length = sizeof_spa(spa); in nfit_test0_setup()
2066 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16); in nfit_test0_setup()
2067 spa->range_index = 5+1; in nfit_test0_setup()
2068 spa->address = t->dcr_dma[3]; in nfit_test0_setup()
2069 spa->length = DCR_SIZE; in nfit_test0_setup()
2070 offset += spa->header.length; in nfit_test0_setup()
2074 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS; in nfit_test0_setup()
2075 spa->header.length = sizeof_spa(spa); in nfit_test0_setup()
2076 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16); in nfit_test0_setup()
2077 spa->range_index = 6+1; in nfit_test0_setup()
2078 spa->address = t->dimm_dma[0]; in nfit_test0_setup()
2079 spa->length = DIMM_SIZE; in nfit_test0_setup()
2080 offset += spa->header.length; in nfit_test0_setup()
2084 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS; in nfit_test0_setup()
2085 spa->header.length = sizeof_spa(spa); in nfit_test0_setup()
2086 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16); in nfit_test0_setup()
2087 spa->range_index = 7+1; in nfit_test0_setup()
2088 spa->address = t->dimm_dma[1]; in nfit_test0_setup()
2089 spa->length = DIMM_SIZE; in nfit_test0_setup()
2090 offset += spa->header.length; in nfit_test0_setup()
2094 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS; in nfit_test0_setup()
2095 spa->header.length = sizeof_spa(spa); in nfit_test0_setup()
2096 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16); in nfit_test0_setup()
2097 spa->range_index = 8+1; in nfit_test0_setup()
2098 spa->address = t->dimm_dma[2]; in nfit_test0_setup()
2099 spa->length = DIMM_SIZE; in nfit_test0_setup()
2100 offset += spa->header.length; in nfit_test0_setup()
2104 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS; in nfit_test0_setup()
2105 spa->header.length = sizeof_spa(spa); in nfit_test0_setup()
2106 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16); in nfit_test0_setup()
2107 spa->range_index = 9+1; in nfit_test0_setup()
2108 spa->address = t->dimm_dma[3]; in nfit_test0_setup()
2109 spa->length = DIMM_SIZE; in nfit_test0_setup()
2110 offset += spa->header.length; in nfit_test0_setup()
2112 /* mem-region0 (spa0, dimm0) */ in nfit_test0_setup()
2114 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test0_setup()
2115 memdev->header.length = sizeof(*memdev); in nfit_test0_setup()
2116 memdev->device_handle = handle[0]; in nfit_test0_setup()
2117 memdev->physical_id = 0; in nfit_test0_setup()
2118 memdev->region_id = 0; in nfit_test0_setup()
2119 memdev->range_index = 0+1; in nfit_test0_setup()
2120 memdev->region_index = 4+1; in nfit_test0_setup()
2121 memdev->region_size = SPA0_SIZE/2; in nfit_test0_setup()
2122 memdev->region_offset = 1; in nfit_test0_setup()
2123 memdev->address = 0; in nfit_test0_setup()
2124 memdev->interleave_index = 0; in nfit_test0_setup()
2125 memdev->interleave_ways = 2; in nfit_test0_setup()
2126 offset += memdev->header.length; in nfit_test0_setup()
2128 /* mem-region1 (spa0, dimm1) */ in nfit_test0_setup()
2130 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test0_setup()
2131 memdev->header.length = sizeof(*memdev); in nfit_test0_setup()
2132 memdev->device_handle = handle[1]; in nfit_test0_setup()
2133 memdev->physical_id = 1; in nfit_test0_setup()
2134 memdev->region_id = 0; in nfit_test0_setup()
2135 memdev->range_index = 0+1; in nfit_test0_setup()
2136 memdev->region_index = 5+1; in nfit_test0_setup()
2137 memdev->region_size = SPA0_SIZE/2; in nfit_test0_setup()
2138 memdev->region_offset = (1 << 8); in nfit_test0_setup()
2139 memdev->address = 0; in nfit_test0_setup()
2140 memdev->interleave_index = 0; in nfit_test0_setup()
2141 memdev->interleave_ways = 2; in nfit_test0_setup()
2142 memdev->flags = ACPI_NFIT_MEM_HEALTH_ENABLED; in nfit_test0_setup()
2143 offset += memdev->header.length; in nfit_test0_setup()
2145 /* mem-region2 (spa1, dimm0) */ in nfit_test0_setup()
2147 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test0_setup()
2148 memdev->header.length = sizeof(*memdev); in nfit_test0_setup()
2149 memdev->device_handle = handle[0]; in nfit_test0_setup()
2150 memdev->physical_id = 0; in nfit_test0_setup()
2151 memdev->region_id = 1; in nfit_test0_setup()
2152 memdev->range_index = 1+1; in nfit_test0_setup()
2153 memdev->region_index = 4+1; in nfit_test0_setup()
2154 memdev->region_size = SPA1_SIZE/4; in nfit_test0_setup()
2155 memdev->region_offset = (1 << 16); in nfit_test0_setup()
2156 memdev->address = SPA0_SIZE/2; in nfit_test0_setup()
2157 memdev->interleave_index = 0; in nfit_test0_setup()
2158 memdev->interleave_ways = 4; in nfit_test0_setup()
2159 memdev->flags = ACPI_NFIT_MEM_HEALTH_ENABLED; in nfit_test0_setup()
2160 offset += memdev->header.length; in nfit_test0_setup()
2162 /* mem-region3 (spa1, dimm1) */ in nfit_test0_setup()
2164 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test0_setup()
2165 memdev->header.length = sizeof(*memdev); in nfit_test0_setup()
2166 memdev->device_handle = handle[1]; in nfit_test0_setup()
2167 memdev->physical_id = 1; in nfit_test0_setup()
2168 memdev->region_id = 1; in nfit_test0_setup()
2169 memdev->range_index = 1+1; in nfit_test0_setup()
2170 memdev->region_index = 5+1; in nfit_test0_setup()
2171 memdev->region_size = SPA1_SIZE/4; in nfit_test0_setup()
2172 memdev->region_offset = (1 << 24); in nfit_test0_setup()
2173 memdev->address = SPA0_SIZE/2; in nfit_test0_setup()
2174 memdev->interleave_index = 0; in nfit_test0_setup()
2175 memdev->interleave_ways = 4; in nfit_test0_setup()
2176 offset += memdev->header.length; in nfit_test0_setup()
2178 /* mem-region4 (spa1, dimm2) */ in nfit_test0_setup()
2180 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test0_setup()
2181 memdev->header.length = sizeof(*memdev); in nfit_test0_setup()
2182 memdev->device_handle = handle[2]; in nfit_test0_setup()
2183 memdev->physical_id = 2; in nfit_test0_setup()
2184 memdev->region_id = 0; in nfit_test0_setup()
2185 memdev->range_index = 1+1; in nfit_test0_setup()
2186 memdev->region_index = 6+1; in nfit_test0_setup()
2187 memdev->region_size = SPA1_SIZE/4; in nfit_test0_setup()
2188 memdev->region_offset = (1ULL << 32); in nfit_test0_setup()
2189 memdev->address = SPA0_SIZE/2; in nfit_test0_setup()
2190 memdev->interleave_index = 0; in nfit_test0_setup()
2191 memdev->interleave_ways = 4; in nfit_test0_setup()
2192 memdev->flags = ACPI_NFIT_MEM_HEALTH_ENABLED; in nfit_test0_setup()
2193 offset += memdev->header.length; in nfit_test0_setup()
2195 /* mem-region5 (spa1, dimm3) */ in nfit_test0_setup()
2197 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test0_setup()
2198 memdev->header.length = sizeof(*memdev); in nfit_test0_setup()
2199 memdev->device_handle = handle[3]; in nfit_test0_setup()
2200 memdev->physical_id = 3; in nfit_test0_setup()
2201 memdev->region_id = 0; in nfit_test0_setup()
2202 memdev->range_index = 1+1; in nfit_test0_setup()
2203 memdev->region_index = 7+1; in nfit_test0_setup()
2204 memdev->region_size = SPA1_SIZE/4; in nfit_test0_setup()
2205 memdev->region_offset = (1ULL << 40); in nfit_test0_setup()
2206 memdev->address = SPA0_SIZE/2; in nfit_test0_setup()
2207 memdev->interleave_index = 0; in nfit_test0_setup()
2208 memdev->interleave_ways = 4; in nfit_test0_setup()
2209 offset += memdev->header.length; in nfit_test0_setup()
2211 /* mem-region6 (spa/dcr0, dimm0) */ in nfit_test0_setup()
2213 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test0_setup()
2214 memdev->header.length = sizeof(*memdev); in nfit_test0_setup()
2215 memdev->device_handle = handle[0]; in nfit_test0_setup()
2216 memdev->physical_id = 0; in nfit_test0_setup()
2217 memdev->region_id = 0; in nfit_test0_setup()
2218 memdev->range_index = 2+1; in nfit_test0_setup()
2219 memdev->region_index = 0+1; in nfit_test0_setup()
2220 memdev->region_size = 0; in nfit_test0_setup()
2221 memdev->region_offset = 0; in nfit_test0_setup()
2222 memdev->address = 0; in nfit_test0_setup()
2223 memdev->interleave_index = 0; in nfit_test0_setup()
2224 memdev->interleave_ways = 1; in nfit_test0_setup()
2225 offset += memdev->header.length; in nfit_test0_setup()
2227 /* mem-region7 (spa/dcr1, dimm1) */ in nfit_test0_setup()
2229 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test0_setup()
2230 memdev->header.length = sizeof(*memdev); in nfit_test0_setup()
2231 memdev->device_handle = handle[1]; in nfit_test0_setup()
2232 memdev->physical_id = 1; in nfit_test0_setup()
2233 memdev->region_id = 0; in nfit_test0_setup()
2234 memdev->range_index = 3+1; in nfit_test0_setup()
2235 memdev->region_index = 1+1; in nfit_test0_setup()
2236 memdev->region_size = 0; in nfit_test0_setup()
2237 memdev->region_offset = 0; in nfit_test0_setup()
2238 memdev->address = 0; in nfit_test0_setup()
2239 memdev->interleave_index = 0; in nfit_test0_setup()
2240 memdev->interleave_ways = 1; in nfit_test0_setup()
2241 offset += memdev->header.length; in nfit_test0_setup()
2243 /* mem-region8 (spa/dcr2, dimm2) */ in nfit_test0_setup()
2245 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test0_setup()
2246 memdev->header.length = sizeof(*memdev); in nfit_test0_setup()
2247 memdev->device_handle = handle[2]; in nfit_test0_setup()
2248 memdev->physical_id = 2; in nfit_test0_setup()
2249 memdev->region_id = 0; in nfit_test0_setup()
2250 memdev->range_index = 4+1; in nfit_test0_setup()
2251 memdev->region_index = 2+1; in nfit_test0_setup()
2252 memdev->region_size = 0; in nfit_test0_setup()
2253 memdev->region_offset = 0; in nfit_test0_setup()
2254 memdev->address = 0; in nfit_test0_setup()
2255 memdev->interleave_index = 0; in nfit_test0_setup()
2256 memdev->interleave_ways = 1; in nfit_test0_setup()
2257 offset += memdev->header.length; in nfit_test0_setup()
2259 /* mem-region9 (spa/dcr3, dimm3) */ in nfit_test0_setup()
2261 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test0_setup()
2262 memdev->header.length = sizeof(*memdev); in nfit_test0_setup()
2263 memdev->device_handle = handle[3]; in nfit_test0_setup()
2264 memdev->physical_id = 3; in nfit_test0_setup()
2265 memdev->region_id = 0; in nfit_test0_setup()
2266 memdev->range_index = 5+1; in nfit_test0_setup()
2267 memdev->region_index = 3+1; in nfit_test0_setup()
2268 memdev->region_size = 0; in nfit_test0_setup()
2269 memdev->region_offset = 0; in nfit_test0_setup()
2270 memdev->address = 0; in nfit_test0_setup()
2271 memdev->interleave_index = 0; in nfit_test0_setup()
2272 memdev->interleave_ways = 1; in nfit_test0_setup()
2273 offset += memdev->header.length; in nfit_test0_setup()
2275 /* mem-region10 (spa/bdw0, dimm0) */ in nfit_test0_setup()
2277 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test0_setup()
2278 memdev->header.length = sizeof(*memdev); in nfit_test0_setup()
2279 memdev->device_handle = handle[0]; in nfit_test0_setup()
2280 memdev->physical_id = 0; in nfit_test0_setup()
2281 memdev->region_id = 0; in nfit_test0_setup()
2282 memdev->range_index = 6+1; in nfit_test0_setup()
2283 memdev->region_index = 0+1; in nfit_test0_setup()
2284 memdev->region_size = 0; in nfit_test0_setup()
2285 memdev->region_offset = 0; in nfit_test0_setup()
2286 memdev->address = 0; in nfit_test0_setup()
2287 memdev->interleave_index = 0; in nfit_test0_setup()
2288 memdev->interleave_ways = 1; in nfit_test0_setup()
2289 offset += memdev->header.length; in nfit_test0_setup()
2291 /* mem-region11 (spa/bdw1, dimm1) */ in nfit_test0_setup()
2293 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test0_setup()
2294 memdev->header.length = sizeof(*memdev); in nfit_test0_setup()
2295 memdev->device_handle = handle[1]; in nfit_test0_setup()
2296 memdev->physical_id = 1; in nfit_test0_setup()
2297 memdev->region_id = 0; in nfit_test0_setup()
2298 memdev->range_index = 7+1; in nfit_test0_setup()
2299 memdev->region_index = 1+1; in nfit_test0_setup()
2300 memdev->region_size = 0; in nfit_test0_setup()
2301 memdev->region_offset = 0; in nfit_test0_setup()
2302 memdev->address = 0; in nfit_test0_setup()
2303 memdev->interleave_index = 0; in nfit_test0_setup()
2304 memdev->interleave_ways = 1; in nfit_test0_setup()
2305 offset += memdev->header.length; in nfit_test0_setup()
2307 /* mem-region12 (spa/bdw2, dimm2) */ in nfit_test0_setup()
2309 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test0_setup()
2310 memdev->header.length = sizeof(*memdev); in nfit_test0_setup()
2311 memdev->device_handle = handle[2]; in nfit_test0_setup()
2312 memdev->physical_id = 2; in nfit_test0_setup()
2313 memdev->region_id = 0; in nfit_test0_setup()
2314 memdev->range_index = 8+1; in nfit_test0_setup()
2315 memdev->region_index = 2+1; in nfit_test0_setup()
2316 memdev->region_size = 0; in nfit_test0_setup()
2317 memdev->region_offset = 0; in nfit_test0_setup()
2318 memdev->address = 0; in nfit_test0_setup()
2319 memdev->interleave_index = 0; in nfit_test0_setup()
2320 memdev->interleave_ways = 1; in nfit_test0_setup()
2321 offset += memdev->header.length; in nfit_test0_setup()
2323 /* mem-region13 (spa/dcr3, dimm3) */ in nfit_test0_setup()
2325 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test0_setup()
2326 memdev->header.length = sizeof(*memdev); in nfit_test0_setup()
2327 memdev->device_handle = handle[3]; in nfit_test0_setup()
2328 memdev->physical_id = 3; in nfit_test0_setup()
2329 memdev->region_id = 0; in nfit_test0_setup()
2330 memdev->range_index = 9+1; in nfit_test0_setup()
2331 memdev->region_index = 3+1; in nfit_test0_setup()
2332 memdev->region_size = 0; in nfit_test0_setup()
2333 memdev->region_offset = 0; in nfit_test0_setup()
2334 memdev->address = 0; in nfit_test0_setup()
2335 memdev->interleave_index = 0; in nfit_test0_setup()
2336 memdev->interleave_ways = 1; in nfit_test0_setup()
2337 memdev->flags = ACPI_NFIT_MEM_HEALTH_ENABLED; in nfit_test0_setup()
2338 offset += memdev->header.length; in nfit_test0_setup()
2340 /* dcr-descriptor0: blk */ in nfit_test0_setup()
2342 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION; in nfit_test0_setup()
2343 dcr->header.length = sizeof(*dcr); in nfit_test0_setup()
2344 dcr->region_index = 0+1; in nfit_test0_setup()
2346 dcr->serial_number = ~handle[0]; in nfit_test0_setup()
2347 dcr->code = NFIT_FIC_BLK; in nfit_test0_setup()
2348 dcr->windows = 1; in nfit_test0_setup()
2349 dcr->window_size = DCR_SIZE; in nfit_test0_setup()
2350 dcr->command_offset = 0; in nfit_test0_setup()
2351 dcr->command_size = 8; in nfit_test0_setup()
2352 dcr->status_offset = 8; in nfit_test0_setup()
2353 dcr->status_size = 4; in nfit_test0_setup()
2354 offset += dcr->header.length; in nfit_test0_setup()
2356 /* dcr-descriptor1: blk */ in nfit_test0_setup()
2358 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION; in nfit_test0_setup()
2359 dcr->header.length = sizeof(*dcr); in nfit_test0_setup()
2360 dcr->region_index = 1+1; in nfit_test0_setup()
2362 dcr->serial_number = ~handle[1]; in nfit_test0_setup()
2363 dcr->code = NFIT_FIC_BLK; in nfit_test0_setup()
2364 dcr->windows = 1; in nfit_test0_setup()
2365 dcr->window_size = DCR_SIZE; in nfit_test0_setup()
2366 dcr->command_offset = 0; in nfit_test0_setup()
2367 dcr->command_size = 8; in nfit_test0_setup()
2368 dcr->status_offset = 8; in nfit_test0_setup()
2369 dcr->status_size = 4; in nfit_test0_setup()
2370 offset += dcr->header.length; in nfit_test0_setup()
2372 /* dcr-descriptor2: blk */ in nfit_test0_setup()
2374 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION; in nfit_test0_setup()
2375 dcr->header.length = sizeof(*dcr); in nfit_test0_setup()
2376 dcr->region_index = 2+1; in nfit_test0_setup()
2378 dcr->serial_number = ~handle[2]; in nfit_test0_setup()
2379 dcr->code = NFIT_FIC_BLK; in nfit_test0_setup()
2380 dcr->windows = 1; in nfit_test0_setup()
2381 dcr->window_size = DCR_SIZE; in nfit_test0_setup()
2382 dcr->command_offset = 0; in nfit_test0_setup()
2383 dcr->command_size = 8; in nfit_test0_setup()
2384 dcr->status_offset = 8; in nfit_test0_setup()
2385 dcr->status_size = 4; in nfit_test0_setup()
2386 offset += dcr->header.length; in nfit_test0_setup()
2388 /* dcr-descriptor3: blk */ in nfit_test0_setup()
2390 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION; in nfit_test0_setup()
2391 dcr->header.length = sizeof(*dcr); in nfit_test0_setup()
2392 dcr->region_index = 3+1; in nfit_test0_setup()
2394 dcr->serial_number = ~handle[3]; in nfit_test0_setup()
2395 dcr->code = NFIT_FIC_BLK; in nfit_test0_setup()
2396 dcr->windows = 1; in nfit_test0_setup()
2397 dcr->window_size = DCR_SIZE; in nfit_test0_setup()
2398 dcr->command_offset = 0; in nfit_test0_setup()
2399 dcr->command_size = 8; in nfit_test0_setup()
2400 dcr->status_offset = 8; in nfit_test0_setup()
2401 dcr->status_size = 4; in nfit_test0_setup()
2402 offset += dcr->header.length; in nfit_test0_setup()
2404 /* dcr-descriptor0: pmem */ in nfit_test0_setup()
2406 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION; in nfit_test0_setup()
2407 dcr->header.length = offsetof(struct acpi_nfit_control_region, in nfit_test0_setup()
2409 dcr->region_index = 4+1; in nfit_test0_setup()
2411 dcr->serial_number = ~handle[0]; in nfit_test0_setup()
2412 dcr->code = NFIT_FIC_BYTEN; in nfit_test0_setup()
2413 dcr->windows = 0; in nfit_test0_setup()
2414 offset += dcr->header.length; in nfit_test0_setup()
2416 /* dcr-descriptor1: pmem */ in nfit_test0_setup()
2418 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION; in nfit_test0_setup()
2419 dcr->header.length = offsetof(struct acpi_nfit_control_region, in nfit_test0_setup()
2421 dcr->region_index = 5+1; in nfit_test0_setup()
2423 dcr->serial_number = ~handle[1]; in nfit_test0_setup()
2424 dcr->code = NFIT_FIC_BYTEN; in nfit_test0_setup()
2425 dcr->windows = 0; in nfit_test0_setup()
2426 offset += dcr->header.length; in nfit_test0_setup()
2428 /* dcr-descriptor2: pmem */ in nfit_test0_setup()
2430 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION; in nfit_test0_setup()
2431 dcr->header.length = offsetof(struct acpi_nfit_control_region, in nfit_test0_setup()
2433 dcr->region_index = 6+1; in nfit_test0_setup()
2435 dcr->serial_number = ~handle[2]; in nfit_test0_setup()
2436 dcr->code = NFIT_FIC_BYTEN; in nfit_test0_setup()
2437 dcr->windows = 0; in nfit_test0_setup()
2438 offset += dcr->header.length; in nfit_test0_setup()
2440 /* dcr-descriptor3: pmem */ in nfit_test0_setup()
2442 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION; in nfit_test0_setup()
2443 dcr->header.length = offsetof(struct acpi_nfit_control_region, in nfit_test0_setup()
2445 dcr->region_index = 7+1; in nfit_test0_setup()
2447 dcr->serial_number = ~handle[3]; in nfit_test0_setup()
2448 dcr->code = NFIT_FIC_BYTEN; in nfit_test0_setup()
2449 dcr->windows = 0; in nfit_test0_setup()
2450 offset += dcr->header.length; in nfit_test0_setup()
2454 bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION; in nfit_test0_setup()
2455 bdw->header.length = sizeof(*bdw); in nfit_test0_setup()
2456 bdw->region_index = 0+1; in nfit_test0_setup()
2457 bdw->windows = 1; in nfit_test0_setup()
2458 bdw->offset = 0; in nfit_test0_setup()
2459 bdw->size = BDW_SIZE; in nfit_test0_setup()
2460 bdw->capacity = DIMM_SIZE; in nfit_test0_setup()
2461 bdw->start_address = 0; in nfit_test0_setup()
2462 offset += bdw->header.length; in nfit_test0_setup()
2466 bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION; in nfit_test0_setup()
2467 bdw->header.length = sizeof(*bdw); in nfit_test0_setup()
2468 bdw->region_index = 1+1; in nfit_test0_setup()
2469 bdw->windows = 1; in nfit_test0_setup()
2470 bdw->offset = 0; in nfit_test0_setup()
2471 bdw->size = BDW_SIZE; in nfit_test0_setup()
2472 bdw->capacity = DIMM_SIZE; in nfit_test0_setup()
2473 bdw->start_address = 0; in nfit_test0_setup()
2474 offset += bdw->header.length; in nfit_test0_setup()
2478 bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION; in nfit_test0_setup()
2479 bdw->header.length = sizeof(*bdw); in nfit_test0_setup()
2480 bdw->region_index = 2+1; in nfit_test0_setup()
2481 bdw->windows = 1; in nfit_test0_setup()
2482 bdw->offset = 0; in nfit_test0_setup()
2483 bdw->size = BDW_SIZE; in nfit_test0_setup()
2484 bdw->capacity = DIMM_SIZE; in nfit_test0_setup()
2485 bdw->start_address = 0; in nfit_test0_setup()
2486 offset += bdw->header.length; in nfit_test0_setup()
2490 bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION; in nfit_test0_setup()
2491 bdw->header.length = sizeof(*bdw); in nfit_test0_setup()
2492 bdw->region_index = 3+1; in nfit_test0_setup()
2493 bdw->windows = 1; in nfit_test0_setup()
2494 bdw->offset = 0; in nfit_test0_setup()
2495 bdw->size = BDW_SIZE; in nfit_test0_setup()
2496 bdw->capacity = DIMM_SIZE; in nfit_test0_setup()
2497 bdw->start_address = 0; in nfit_test0_setup()
2498 offset += bdw->header.length; in nfit_test0_setup()
2502 flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS; in nfit_test0_setup()
2503 flush->header.length = flush_hint_size; in nfit_test0_setup()
2504 flush->device_handle = handle[0]; in nfit_test0_setup()
2505 flush->hint_count = NUM_HINTS; in nfit_test0_setup()
2507 flush->hint_address[i] = t->flush_dma[0] + i * sizeof(u64); in nfit_test0_setup()
2508 offset += flush->header.length; in nfit_test0_setup()
2512 flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS; in nfit_test0_setup()
2513 flush->header.length = flush_hint_size; in nfit_test0_setup()
2514 flush->device_handle = handle[1]; in nfit_test0_setup()
2515 flush->hint_count = NUM_HINTS; in nfit_test0_setup()
2517 flush->hint_address[i] = t->flush_dma[1] + i * sizeof(u64); in nfit_test0_setup()
2518 offset += flush->header.length; in nfit_test0_setup()
2522 flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS; in nfit_test0_setup()
2523 flush->header.length = flush_hint_size; in nfit_test0_setup()
2524 flush->device_handle = handle[2]; in nfit_test0_setup()
2525 flush->hint_count = NUM_HINTS; in nfit_test0_setup()
2527 flush->hint_address[i] = t->flush_dma[2] + i * sizeof(u64); in nfit_test0_setup()
2528 offset += flush->header.length; in nfit_test0_setup()
2532 flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS; in nfit_test0_setup()
2533 flush->header.length = flush_hint_size; in nfit_test0_setup()
2534 flush->device_handle = handle[3]; in nfit_test0_setup()
2535 flush->hint_count = NUM_HINTS; in nfit_test0_setup()
2537 flush->hint_address[i] = t->flush_dma[3] + i * sizeof(u64); in nfit_test0_setup()
2538 offset += flush->header.length; in nfit_test0_setup()
2542 pcap->header.type = ACPI_NFIT_TYPE_CAPABILITIES; in nfit_test0_setup()
2543 pcap->header.length = sizeof(*pcap); in nfit_test0_setup()
2544 pcap->highest_capability = 1; in nfit_test0_setup()
2545 pcap->capabilities = ACPI_NFIT_CAPABILITY_MEM_FLUSH; in nfit_test0_setup()
2546 offset += pcap->header.length; in nfit_test0_setup()
2548 if (t->setup_hotplug) { in nfit_test0_setup()
2549 /* dcr-descriptor4: blk */ in nfit_test0_setup()
2551 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION; in nfit_test0_setup()
2552 dcr->header.length = sizeof(*dcr); in nfit_test0_setup()
2553 dcr->region_index = 8+1; in nfit_test0_setup()
2555 dcr->serial_number = ~handle[4]; in nfit_test0_setup()
2556 dcr->code = NFIT_FIC_BLK; in nfit_test0_setup()
2557 dcr->windows = 1; in nfit_test0_setup()
2558 dcr->window_size = DCR_SIZE; in nfit_test0_setup()
2559 dcr->command_offset = 0; in nfit_test0_setup()
2560 dcr->command_size = 8; in nfit_test0_setup()
2561 dcr->status_offset = 8; in nfit_test0_setup()
2562 dcr->status_size = 4; in nfit_test0_setup()
2563 offset += dcr->header.length; in nfit_test0_setup()
2565 /* dcr-descriptor4: pmem */ in nfit_test0_setup()
2567 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION; in nfit_test0_setup()
2568 dcr->header.length = offsetof(struct acpi_nfit_control_region, in nfit_test0_setup()
2570 dcr->region_index = 9+1; in nfit_test0_setup()
2572 dcr->serial_number = ~handle[4]; in nfit_test0_setup()
2573 dcr->code = NFIT_FIC_BYTEN; in nfit_test0_setup()
2574 dcr->windows = 0; in nfit_test0_setup()
2575 offset += dcr->header.length; in nfit_test0_setup()
2579 bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION; in nfit_test0_setup()
2580 bdw->header.length = sizeof(*bdw); in nfit_test0_setup()
2581 bdw->region_index = 8+1; in nfit_test0_setup()
2582 bdw->windows = 1; in nfit_test0_setup()
2583 bdw->offset = 0; in nfit_test0_setup()
2584 bdw->size = BDW_SIZE; in nfit_test0_setup()
2585 bdw->capacity = DIMM_SIZE; in nfit_test0_setup()
2586 bdw->start_address = 0; in nfit_test0_setup()
2587 offset += bdw->header.length; in nfit_test0_setup()
2591 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS; in nfit_test0_setup()
2592 spa->header.length = sizeof_spa(spa); in nfit_test0_setup()
2593 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16); in nfit_test0_setup()
2594 spa->range_index = 10+1; in nfit_test0_setup()
2595 spa->address = t->dcr_dma[4]; in nfit_test0_setup()
2596 spa->length = DCR_SIZE; in nfit_test0_setup()
2597 offset += spa->header.length; in nfit_test0_setup()
2600 * spa11 (single-dimm interleave for hotplug, note storage in nfit_test0_setup()
2601 * does not actually alias the related block-data-window in nfit_test0_setup()
2602 * regions) in nfit_test0_setup()
2605 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS; in nfit_test0_setup()
2606 spa->header.length = sizeof_spa(spa); in nfit_test0_setup()
2607 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16); in nfit_test0_setup()
2608 spa->range_index = 11+1; in nfit_test0_setup()
2609 spa->address = t->spa_set_dma[2]; in nfit_test0_setup()
2610 spa->length = SPA0_SIZE; in nfit_test0_setup()
2611 offset += spa->header.length; in nfit_test0_setup()
2615 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS; in nfit_test0_setup()
2616 spa->header.length = sizeof_spa(spa); in nfit_test0_setup()
2617 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16); in nfit_test0_setup()
2618 spa->range_index = 12+1; in nfit_test0_setup()
2619 spa->address = t->dimm_dma[4]; in nfit_test0_setup()
2620 spa->length = DIMM_SIZE; in nfit_test0_setup()
2621 offset += spa->header.length; in nfit_test0_setup()
2623 /* mem-region14 (spa/dcr4, dimm4) */ in nfit_test0_setup()
2625 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test0_setup()
2626 memdev->header.length = sizeof(*memdev); in nfit_test0_setup()
2627 memdev->device_handle = handle[4]; in nfit_test0_setup()
2628 memdev->physical_id = 4; in nfit_test0_setup()
2629 memdev->region_id = 0; in nfit_test0_setup()
2630 memdev->range_index = 10+1; in nfit_test0_setup()
2631 memdev->region_index = 8+1; in nfit_test0_setup()
2632 memdev->region_size = 0; in nfit_test0_setup()
2633 memdev->region_offset = 0; in nfit_test0_setup()
2634 memdev->address = 0; in nfit_test0_setup()
2635 memdev->interleave_index = 0; in nfit_test0_setup()
2636 memdev->interleave_ways = 1; in nfit_test0_setup()
2637 offset += memdev->header.length; in nfit_test0_setup()
2639 /* mem-region15 (spa11, dimm4) */ in nfit_test0_setup()
2641 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test0_setup()
2642 memdev->header.length = sizeof(*memdev); in nfit_test0_setup()
2643 memdev->device_handle = handle[4]; in nfit_test0_setup()
2644 memdev->physical_id = 4; in nfit_test0_setup()
2645 memdev->region_id = 0; in nfit_test0_setup()
2646 memdev->range_index = 11+1; in nfit_test0_setup()
2647 memdev->region_index = 9+1; in nfit_test0_setup()
2648 memdev->region_size = SPA0_SIZE; in nfit_test0_setup()
2649 memdev->region_offset = (1ULL << 48); in nfit_test0_setup()
2650 memdev->address = 0; in nfit_test0_setup()
2651 memdev->interleave_index = 0; in nfit_test0_setup()
2652 memdev->interleave_ways = 1; in nfit_test0_setup()
2653 memdev->flags = ACPI_NFIT_MEM_HEALTH_ENABLED; in nfit_test0_setup()
2654 offset += memdev->header.length; in nfit_test0_setup()
2656 /* mem-region16 (spa/bdw4, dimm4) */ in nfit_test0_setup()
2658 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test0_setup()
2659 memdev->header.length = sizeof(*memdev); in nfit_test0_setup()
2660 memdev->device_handle = handle[4]; in nfit_test0_setup()
2661 memdev->physical_id = 4; in nfit_test0_setup()
2662 memdev->region_id = 0; in nfit_test0_setup()
2663 memdev->range_index = 12+1; in nfit_test0_setup()
2664 memdev->region_index = 8+1; in nfit_test0_setup()
2665 memdev->region_size = 0; in nfit_test0_setup()
2666 memdev->region_offset = 0; in nfit_test0_setup()
2667 memdev->address = 0; in nfit_test0_setup()
2668 memdev->interleave_index = 0; in nfit_test0_setup()
2669 memdev->interleave_ways = 1; in nfit_test0_setup()
2670 offset += memdev->header.length; in nfit_test0_setup()
2674 flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS; in nfit_test0_setup()
2675 flush->header.length = flush_hint_size; in nfit_test0_setup()
2676 flush->device_handle = handle[4]; in nfit_test0_setup()
2677 flush->hint_count = NUM_HINTS; in nfit_test0_setup()
2679 flush->hint_address[i] = t->flush_dma[4] in nfit_test0_setup()
2681 offset += flush->header.length; in nfit_test0_setup()
2684 WARN_ON(offset != t->nfit_size); in nfit_test0_setup()
2687 t->nfit_filled = offset; in nfit_test0_setup()
2689 post_ars_status(&t->ars_state, &t->badrange, t->spa_set_dma[0], in nfit_test0_setup()
2692 acpi_desc = &t->acpi_desc; in nfit_test0_setup()
2693 set_bit(ND_CMD_GET_CONFIG_SIZE, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2694 set_bit(ND_CMD_GET_CONFIG_DATA, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2695 set_bit(ND_CMD_SET_CONFIG_DATA, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2696 set_bit(ND_INTEL_SMART, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2697 set_bit(ND_INTEL_SMART_THRESHOLD, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2698 set_bit(ND_INTEL_SMART_SET_THRESHOLD, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2699 set_bit(ND_INTEL_SMART_INJECT, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2700 set_bit(ND_CMD_ARS_CAP, &acpi_desc->bus_cmd_force_en); in nfit_test0_setup()
2701 set_bit(ND_CMD_ARS_START, &acpi_desc->bus_cmd_force_en); in nfit_test0_setup()
2702 set_bit(ND_CMD_ARS_STATUS, &acpi_desc->bus_cmd_force_en); in nfit_test0_setup()
2703 set_bit(ND_CMD_CLEAR_ERROR, &acpi_desc->bus_cmd_force_en); in nfit_test0_setup()
2704 set_bit(ND_CMD_CALL, &acpi_desc->bus_cmd_force_en); in nfit_test0_setup()
2705 set_bit(NFIT_CMD_TRANSLATE_SPA, &acpi_desc->bus_dsm_mask); in nfit_test0_setup()
2706 set_bit(NFIT_CMD_ARS_INJECT_SET, &acpi_desc->bus_dsm_mask); in nfit_test0_setup()
2707 set_bit(NFIT_CMD_ARS_INJECT_CLEAR, &acpi_desc->bus_dsm_mask); in nfit_test0_setup()
2708 set_bit(NFIT_CMD_ARS_INJECT_GET, &acpi_desc->bus_dsm_mask); in nfit_test0_setup()
2709 set_bit(ND_INTEL_FW_GET_INFO, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2710 set_bit(ND_INTEL_FW_START_UPDATE, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2711 set_bit(ND_INTEL_FW_SEND_DATA, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2712 set_bit(ND_INTEL_FW_FINISH_UPDATE, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2713 set_bit(ND_INTEL_FW_FINISH_QUERY, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2714 set_bit(ND_INTEL_ENABLE_LSS_STATUS, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2716 &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2717 set_bit(NVDIMM_INTEL_SET_PASSPHRASE, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2719 &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2720 set_bit(NVDIMM_INTEL_UNLOCK_UNIT, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2721 set_bit(NVDIMM_INTEL_FREEZE_LOCK, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2722 set_bit(NVDIMM_INTEL_SECURE_ERASE, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2723 set_bit(NVDIMM_INTEL_OVERWRITE, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2724 set_bit(NVDIMM_INTEL_QUERY_OVERWRITE, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2726 &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2728 &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2729 set_bit(NVDIMM_INTEL_FW_ACTIVATE_DIMMINFO, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2730 set_bit(NVDIMM_INTEL_FW_ACTIVATE_ARM, &acpi_desc->dimm_cmd_force_en); in nfit_test0_setup()
2732 acpi_mask = &acpi_desc->family_dsm_mask[NVDIMM_BUS_FAMILY_INTEL]; in nfit_test0_setup()
2740 void *nfit_buf = t->nfit_buf; in nfit_test1_setup()
2749 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS; in nfit_test1_setup()
2750 spa->header.length = sizeof_spa(spa); in nfit_test1_setup()
2751 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16); in nfit_test1_setup()
2752 spa->range_index = 0+1; in nfit_test1_setup()
2753 spa->address = t->spa_set_dma[0]; in nfit_test1_setup()
2754 spa->length = SPA2_SIZE; in nfit_test1_setup()
2755 offset += spa->header.length; in nfit_test1_setup()
2759 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS; in nfit_test1_setup()
2760 spa->header.length = sizeof_spa(spa); in nfit_test1_setup()
2761 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_VCD), 16); in nfit_test1_setup()
2762 spa->range_index = 0; in nfit_test1_setup()
2763 spa->address = t->spa_set_dma[1]; in nfit_test1_setup()
2764 spa->length = SPA_VCD_SIZE; in nfit_test1_setup()
2765 offset += spa->header.length; in nfit_test1_setup()
2767 /* mem-region0 (spa0, dimm0) */ in nfit_test1_setup()
2769 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test1_setup()
2770 memdev->header.length = sizeof(*memdev); in nfit_test1_setup()
2771 memdev->device_handle = handle[5]; in nfit_test1_setup()
2772 memdev->physical_id = 0; in nfit_test1_setup()
2773 memdev->region_id = 0; in nfit_test1_setup()
2774 memdev->range_index = 0+1; in nfit_test1_setup()
2775 memdev->region_index = 0+1; in nfit_test1_setup()
2776 memdev->region_size = SPA2_SIZE; in nfit_test1_setup()
2777 memdev->region_offset = 0; in nfit_test1_setup()
2778 memdev->address = 0; in nfit_test1_setup()
2779 memdev->interleave_index = 0; in nfit_test1_setup()
2780 memdev->interleave_ways = 1; in nfit_test1_setup()
2781 memdev->flags = ACPI_NFIT_MEM_SAVE_FAILED | ACPI_NFIT_MEM_RESTORE_FAILED in nfit_test1_setup()
2784 offset += memdev->header.length; in nfit_test1_setup()
2786 /* dcr-descriptor0 */ in nfit_test1_setup()
2788 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION; in nfit_test1_setup()
2789 dcr->header.length = offsetof(struct acpi_nfit_control_region, in nfit_test1_setup()
2791 dcr->region_index = 0+1; in nfit_test1_setup()
2793 dcr->serial_number = ~handle[5]; in nfit_test1_setup()
2794 dcr->code = NFIT_FIC_BYTE; in nfit_test1_setup()
2795 dcr->windows = 0; in nfit_test1_setup()
2796 offset += dcr->header.length; in nfit_test1_setup()
2799 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP; in nfit_test1_setup()
2800 memdev->header.length = sizeof(*memdev); in nfit_test1_setup()
2801 memdev->device_handle = handle[6]; in nfit_test1_setup()
2802 memdev->physical_id = 0; in nfit_test1_setup()
2803 memdev->region_id = 0; in nfit_test1_setup()
2804 memdev->range_index = 0; in nfit_test1_setup()
2805 memdev->region_index = 0+2; in nfit_test1_setup()
2806 memdev->region_size = SPA2_SIZE; in nfit_test1_setup()
2807 memdev->region_offset = 0; in nfit_test1_setup()
2808 memdev->address = 0; in nfit_test1_setup()
2809 memdev->interleave_index = 0; in nfit_test1_setup()
2810 memdev->interleave_ways = 1; in nfit_test1_setup()
2811 memdev->flags = ACPI_NFIT_MEM_MAP_FAILED; in nfit_test1_setup()
2812 offset += memdev->header.length; in nfit_test1_setup()
2814 /* dcr-descriptor1 */ in nfit_test1_setup()
2816 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION; in nfit_test1_setup()
2817 dcr->header.length = offsetof(struct acpi_nfit_control_region, in nfit_test1_setup()
2819 dcr->region_index = 0+2; in nfit_test1_setup()
2821 dcr->serial_number = ~handle[6]; in nfit_test1_setup()
2822 dcr->code = NFIT_FIC_BYTE; in nfit_test1_setup()
2823 dcr->windows = 0; in nfit_test1_setup()
2824 offset += dcr->header.length; in nfit_test1_setup()
2827 WARN_ON(offset != t->nfit_size); in nfit_test1_setup()
2829 t->nfit_filled = offset; in nfit_test1_setup()
2831 post_ars_status(&t->ars_state, &t->badrange, t->spa_set_dma[0], in nfit_test1_setup()
2834 acpi_desc = &t->acpi_desc; in nfit_test1_setup()
2835 set_bit(ND_CMD_ARS_CAP, &acpi_desc->bus_cmd_force_en); in nfit_test1_setup()
2836 set_bit(ND_CMD_ARS_START, &acpi_desc->bus_cmd_force_en); in nfit_test1_setup()
2837 set_bit(ND_CMD_ARS_STATUS, &acpi_desc->bus_cmd_force_en); in nfit_test1_setup()
2838 set_bit(ND_CMD_CLEAR_ERROR, &acpi_desc->bus_cmd_force_en); in nfit_test1_setup()
2839 set_bit(ND_INTEL_ENABLE_LSS_STATUS, &acpi_desc->dimm_cmd_force_en); in nfit_test1_setup()
2840 set_bit(ND_CMD_GET_CONFIG_SIZE, &acpi_desc->dimm_cmd_force_en); in nfit_test1_setup()
2841 set_bit(ND_CMD_GET_CONFIG_DATA, &acpi_desc->dimm_cmd_force_en); in nfit_test1_setup()
2842 set_bit(ND_CMD_SET_CONFIG_DATA, &acpi_desc->dimm_cmd_force_en); in nfit_test1_setup()
2848 struct nfit_blk *nfit_blk = ndbr->blk_provider_data; in nfit_test_blk_do_io()
2849 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW]; in nfit_test_blk_do_io()
2850 struct nd_region *nd_region = &ndbr->nd_region; in nfit_test_blk_do_io()
2855 memcpy(mmio->addr.base + dpa, iobuf, len); in nfit_test_blk_do_io()
2857 memcpy(iobuf, mmio->addr.base + dpa, len); in nfit_test_blk_do_io()
2860 arch_invalidate_pmem(mmio->addr.base + dpa, len); in nfit_test_blk_do_io()
2875 return ERR_PTR(-ENXIO); in nfit_test_evaluate_dsm()
2884 return -ENOMEM; in setup_result()
2885 result->package.type = ACPI_TYPE_BUFFER, in setup_result()
2886 result->buffer.pointer = (void *) (result + 1); in setup_result()
2887 result->buffer.length = size; in setup_result()
2888 memcpy(result->buffer.pointer, buf, size); in setup_result()
2918 return -ENOMEM; in nfit_ctl_test()
2922 .init_name = "test-adev", in nfit_ctl_test()
2928 return -ENOMEM; in nfit_ctl_test()
2948 .dev = &adev->dev, in nfit_ctl_test()
2953 return -ENOMEM; in nfit_ctl_test()
2967 return -ENOMEM; in nfit_ctl_test()
2972 .init_name = "test-dimm", in nfit_ctl_test()
2987 rc = acpi_nfit_ctl(&acpi_desc->nd_desc, nvdimm, ND_CMD_GET_CONFIG_SIZE, in nfit_ctl_test()
2995 return -EIO; in nfit_ctl_test()
3007 rc = acpi_nfit_ctl(&acpi_desc->nd_desc, NULL, ND_CMD_ARS_STATUS, in nfit_ctl_test()
3013 return -EIO; in nfit_ctl_test()
3023 rc = setup_result(cmd.buf + offset, cmd_size - offset); in nfit_ctl_test()
3026 rc = acpi_nfit_ctl(&acpi_desc->nd_desc, NULL, ND_CMD_ARS_CAP, in nfit_ctl_test()
3032 return -EIO; in nfit_ctl_test()
3039 .out_length = cmd_size - 4, in nfit_ctl_test()
3048 rc = acpi_nfit_ctl(&acpi_desc->nd_desc, NULL, ND_CMD_ARS_STATUS, in nfit_ctl_test()
3051 if (rc < 0 || cmd_rc || record->length != test_val) { in nfit_ctl_test()
3054 return -EIO; in nfit_ctl_test()
3070 rc = acpi_nfit_ctl(&acpi_desc->nd_desc, NULL, ND_CMD_ARS_STATUS, in nfit_ctl_test()
3073 if (rc < 0 || cmd_rc || record->length != test_val) { in nfit_ctl_test()
3076 return -EIO; in nfit_ctl_test()
3088 rc = acpi_nfit_ctl(&acpi_desc->nd_desc, nvdimm, ND_CMD_GET_CONFIG_SIZE, in nfit_ctl_test()
3094 return -EIO; in nfit_ctl_test()
3106 rc = acpi_nfit_ctl(&acpi_desc->nd_desc, NULL, ND_CMD_CLEAR_ERROR, in nfit_ctl_test()
3111 return -EIO; in nfit_ctl_test()
3136 rc = acpi_nfit_ctl(&acpi_desc->nd_desc, NULL, ND_CMD_CALL, in nfit_ctl_test()
3141 return -EIO; in nfit_ctl_test()
3151 struct device *dev = &pdev->dev; in nfit_test_probe()
3157 if (strcmp(dev_name(&pdev->dev), "nfit_test.0") == 0) { in nfit_test_probe()
3158 rc = nfit_ctl_test(&pdev->dev); in nfit_test_probe()
3163 nfit_test = to_nfit_test(&pdev->dev); in nfit_test_probe()
3166 if (nfit_test->num_dcr) { in nfit_test_probe()
3167 int num = nfit_test->num_dcr; in nfit_test_probe()
3169 nfit_test->dimm = devm_kcalloc(dev, num, sizeof(void *), in nfit_test_probe()
3171 nfit_test->dimm_dma = devm_kcalloc(dev, num, sizeof(dma_addr_t), in nfit_test_probe()
3173 nfit_test->flush = devm_kcalloc(dev, num, sizeof(void *), in nfit_test_probe()
3175 nfit_test->flush_dma = devm_kcalloc(dev, num, sizeof(dma_addr_t), in nfit_test_probe()
3177 nfit_test->label = devm_kcalloc(dev, num, sizeof(void *), in nfit_test_probe()
3179 nfit_test->label_dma = devm_kcalloc(dev, num, in nfit_test_probe()
3181 nfit_test->dcr = devm_kcalloc(dev, num, in nfit_test_probe()
3183 nfit_test->dcr_dma = devm_kcalloc(dev, num, in nfit_test_probe()
3185 nfit_test->smart = devm_kcalloc(dev, num, in nfit_test_probe()
3187 nfit_test->smart_threshold = devm_kcalloc(dev, num, in nfit_test_probe()
3190 nfit_test->fw = devm_kcalloc(dev, num, in nfit_test_probe()
3192 if (nfit_test->dimm && nfit_test->dimm_dma && nfit_test->label in nfit_test_probe()
3193 && nfit_test->label_dma && nfit_test->dcr in nfit_test_probe()
3194 && nfit_test->dcr_dma && nfit_test->flush in nfit_test_probe()
3195 && nfit_test->flush_dma in nfit_test_probe()
3196 && nfit_test->fw) in nfit_test_probe()
3199 return -ENOMEM; in nfit_test_probe()
3202 if (nfit_test->num_pm) { in nfit_test_probe()
3203 int num = nfit_test->num_pm; in nfit_test_probe()
3205 nfit_test->spa_set = devm_kcalloc(dev, num, sizeof(void *), in nfit_test_probe()
3207 nfit_test->spa_set_dma = devm_kcalloc(dev, num, in nfit_test_probe()
3209 if (nfit_test->spa_set && nfit_test->spa_set_dma) in nfit_test_probe()
3212 return -ENOMEM; in nfit_test_probe()
3215 /* per-nfit specific alloc */ in nfit_test_probe()
3216 if (nfit_test->alloc(nfit_test)) in nfit_test_probe()
3217 return -ENOMEM; in nfit_test_probe()
3219 nfit_test->setup(nfit_test); in nfit_test_probe()
3220 acpi_desc = &nfit_test->acpi_desc; in nfit_test_probe()
3221 acpi_nfit_desc_init(acpi_desc, &pdev->dev); in nfit_test_probe()
3222 acpi_desc->blk_do_io = nfit_test_blk_do_io; in nfit_test_probe()
3223 nd_desc = &acpi_desc->nd_desc; in nfit_test_probe()
3224 nd_desc->provider_name = NULL; in nfit_test_probe()
3225 nd_desc->module = THIS_MODULE; in nfit_test_probe()
3226 nd_desc->ndctl = nfit_test_ctl; in nfit_test_probe()
3228 rc = acpi_nfit_init(acpi_desc, nfit_test->nfit_buf, in nfit_test_probe()
3229 nfit_test->nfit_filled); in nfit_test_probe()
3233 rc = devm_add_action_or_reset(&pdev->dev, acpi_nfit_shutdown, acpi_desc); in nfit_test_probe()
3237 if (nfit_test->setup != nfit_test0_setup) in nfit_test_probe()
3240 nfit_test->setup_hotplug = 1; in nfit_test_probe()
3241 nfit_test->setup(nfit_test); in nfit_test_probe()
3245 return -ENOMEM; in nfit_test_probe()
3246 obj->type = ACPI_TYPE_BUFFER; in nfit_test_probe()
3247 obj->buffer.length = nfit_test->nfit_size; in nfit_test_probe()
3248 obj->buffer.pointer = nfit_test->nfit_buf; in nfit_test_probe()
3249 *(nfit_test->_fit) = obj; in nfit_test_probe()
3250 __acpi_nfit_notify(&pdev->dev, nfit_test, 0x80); in nfit_test_probe()
3253 mutex_lock(&acpi_desc->init_mutex); in nfit_test_probe()
3254 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) { in nfit_test_probe()
3255 u32 nfit_handle = __to_nfit_memdev(nfit_mem)->device_handle; in nfit_test_probe()
3260 dev_set_drvdata(nfit_test->dimm_dev[i], in nfit_test_probe()
3263 mutex_unlock(&acpi_desc->init_mutex); in nfit_test_probe()
3312 return -ENOMEM; in nfit_test_init()
3322 rc = -ENOMEM; in nfit_test_init()
3327 rc = -ENOMEM; in nfit_test_init()
3337 rc = -ENOMEM; in nfit_test_init()
3340 INIT_LIST_HEAD(&nfit_test->resources); in nfit_test_init()
3341 badrange_init(&nfit_test->badrange); in nfit_test_init()
3344 nfit_test->num_pm = NUM_PM; in nfit_test_init()
3345 nfit_test->dcr_idx = 0; in nfit_test_init()
3346 nfit_test->num_dcr = NUM_DCR; in nfit_test_init()
3347 nfit_test->alloc = nfit_test0_alloc; in nfit_test_init()
3348 nfit_test->setup = nfit_test0_setup; in nfit_test_init()
3351 nfit_test->num_pm = 2; in nfit_test_init()
3352 nfit_test->dcr_idx = NUM_DCR; in nfit_test_init()
3353 nfit_test->num_dcr = 2; in nfit_test_init()
3354 nfit_test->alloc = nfit_test1_alloc; in nfit_test_init()
3355 nfit_test->setup = nfit_test1_setup; in nfit_test_init()
3358 rc = -EINVAL; in nfit_test_init()
3361 pdev = &nfit_test->pdev; in nfit_test_init()
3362 pdev->name = KBUILD_MODNAME; in nfit_test_init()
3363 pdev->id = i; in nfit_test_init()
3364 pdev->dev.release = nfit_test_release; in nfit_test_init()
3367 put_device(&pdev->dev); in nfit_test_init()
3370 get_device(&pdev->dev); in nfit_test_init()
3372 rc = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); in nfit_test_init()
3377 INIT_WORK(&nfit_test->work, uc_error_notify); in nfit_test_init()
3392 platform_device_unregister(&instances[i]->pdev); in nfit_test_init()
3396 put_device(&instances[i]->pdev.dev); in nfit_test_init()
3408 platform_device_unregister(&instances[i]->pdev); in nfit_test_exit()
3415 put_device(&instances[i]->pdev.dev); in nfit_test_exit()