22 static void pr_ibs_fetch_ctl(union ibs_fetch_ctl reg)  in pr_ibs_fetch_ctl()  argument
48 		if (reg.phy_addr_valid)  in pr_ibs_fetch_ctl()
49 			l1tlb_pgsz_str = l1tlb_pgsz_strs_erratum1347[reg.l1tlb_pgsz];  in pr_ibs_fetch_ctl()
51 		if (reg.phy_addr_valid)  in pr_ibs_fetch_ctl()
52 			l1tlb_pgsz_str = l1tlb_pgsz_strs[reg.l1tlb_pgsz];  in pr_ibs_fetch_ctl()
53 		ic_miss_str = ic_miss_strs[reg.ic_miss];  in pr_ibs_fetch_ctl()
58 		reg.val, reg.fetch_maxcnt << 4, reg.fetch_cnt << 4, reg.fetch_lat,  in pr_ibs_fetch_ctl()
59 		reg.fetch_en, reg.fetch_val, reg.fetch_comp, ic_miss_str ? : "",  in pr_ibs_fetch_ctl()
60 		reg.phy_addr_valid, l1tlb_pgsz_str ? : "", reg.l1tlb_miss, reg.l2tlb_miss,  in pr_ibs_fetch_ctl()
61 		reg.rand_en, reg.fetch_comp ? (reg.fetch_l2_miss ? " L2Miss 1" : " L2Miss 0") : "");  in pr_ibs_fetch_ctl()
64 static void pr_ic_ibs_extd_ctl(union ic_ibs_extd_ctl reg)  in pr_ic_ibs_extd_ctl()  argument
66 	printf("ic_ibs_ext_ctl:\t%016llx IbsItlbRefillLat %3d\n", reg.val, reg.itlb_refill_lat);  in pr_ic_ibs_extd_ctl()
69 static void pr_ibs_op_ctl(union ibs_op_ctl reg)  in pr_ibs_op_ctl()  argument
72 	       reg.val, ((reg.opmaxcnt_ext << 16) | reg.opmaxcnt) << 4, reg.op_en, reg.op_val,  in pr_ibs_op_ctl()
73 	       reg.cnt_ctl, reg.cnt_ctl ? "uOps" : "cycles", reg.opcurcnt);  in pr_ibs_op_ctl()
76 static void pr_ibs_op_data(union ibs_op_data reg)  in pr_ibs_op_data()  argument
80 		reg.val, reg.comp_to_ret_ctr, reg.tag_to_ret_ctr,  in pr_ibs_op_data()
81 		reg.op_brn_ret ? (reg.op_return ? " OpReturn 1" : " OpReturn 0") : "",  in pr_ibs_op_data()
82 		reg.op_brn_ret ? (reg.op_brn_taken ? " OpBrnTaken 1" : " OpBrnTaken 0") : "",  in pr_ibs_op_data()
83 		reg.op_brn_ret ? (reg.op_brn_misp ? " OpBrnMisp 1" : " OpBrnMisp 0") : "",  in pr_ibs_op_data()
84 		reg.op_brn_ret, reg.op_rip_invalid, reg.op_brn_fuse, reg.op_microcode);  in pr_ibs_op_data()
87 static void pr_ibs_op_data2(union ibs_op_data2 reg)  in pr_ibs_op_data2()  argument
100 	printf("ibs_op_data2:\t%016llx %sRmtNode %d%s\n", reg.val,  in pr_ibs_op_data2()
101 	       reg.data_src == 2 ? (reg.cache_hit_st ? "CacheHitSt 1=O-State "  in pr_ibs_op_data2()
103 	       reg.rmt_node, data_src_str[reg.data_src]);  in pr_ibs_op_data2()
106 static void pr_ibs_op_data3(union ibs_op_data3 reg)  in pr_ibs_op_data3()  argument
116 	if (!(cpu_family == 0x19 && cpu_model < 0x10 && (reg.dc_miss_no_mab_alloc || reg.sw_pf))) {  in pr_ibs_op_data3()
117 		snprintf(l2_miss_str, sizeof(l2_miss_str), " L2Miss %d", reg.l2_miss);  in pr_ibs_op_data3()
119 			 " OpDcMissOpenMemReqs %2d", reg.op_dc_miss_open_mem_reqs);  in pr_ibs_op_data3()
122 	if (reg.op_mem_width)  in pr_ibs_op_data3()
124 			 " OpMemWidth %2d bytes", 1 << (reg.op_mem_width - 1));  in pr_ibs_op_data3()
130 		reg.val, reg.ld_op, reg.st_op, reg.dc_l1tlb_miss, reg.dc_l2tlb_miss,  in pr_ibs_op_data3()
131 		reg.dc_l1tlb_hit_2m, reg.dc_l1tlb_hit_1g, reg.dc_l2tlb_hit_2m, reg.dc_miss,  in pr_ibs_op_data3()
132 		reg.dc_mis_acc, reg.dc_wc_mem_acc, reg.dc_uc_mem_acc, reg.dc_locked_op,  in pr_ibs_op_data3()
133 		reg.dc_miss_no_mab_alloc, reg.dc_lin_addr_valid, reg.dc_phy_addr_valid,  in pr_ibs_op_data3()
134 		reg.dc_l2_tlb_hit_1g, l2_miss_str, reg.sw_pf, op_mem_width_str,  in pr_ibs_op_data3()
135 		op_dc_miss_open_mem_reqs_str, reg.dc_miss_lat, reg.tlb_refill_lat);  in pr_ibs_op_data3()