140 static inline void mcasp_clr_bits(struct davinci_mcasp *mcasp, u32 offset,  in mcasp_clr_bits()  function
198 			mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(bit));  in mcasp_set_clk_pdir()
210 			mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(bit));  in mcasp_set_axr_pdir()
219 		mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);  in mcasp_start_rx()
259 		mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);  in mcasp_start_tx()
303 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_EVTCTLR_REG,  in mcasp_stop_rx()
321 		mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);  in mcasp_stop_rx()
330 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_EVTCTLX_REG,  in mcasp_stop_tx()
349 		mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);  in mcasp_stop_tx()
456 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);  in davinci_mcasp_set_dai_fmt()
457 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);  in davinci_mcasp_set_dai_fmt()
463 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);  in davinci_mcasp_set_dai_fmt()
464 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);  in davinci_mcasp_set_dai_fmt()
516 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE);  in davinci_mcasp_set_dai_fmt()
519 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE);  in davinci_mcasp_set_dai_fmt()
532 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);  in davinci_mcasp_set_dai_fmt()
535 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);  in davinci_mcasp_set_dai_fmt()
549 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);  in davinci_mcasp_set_dai_fmt()
550 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE);  in davinci_mcasp_set_dai_fmt()
552 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);  in davinci_mcasp_set_dai_fmt()
553 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE);  in davinci_mcasp_set_dai_fmt()
571 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);  in davinci_mcasp_set_dai_fmt()
572 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);  in davinci_mcasp_set_dai_fmt()
581 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);  in davinci_mcasp_set_dai_fmt()
582 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);  in davinci_mcasp_set_dai_fmt()
599 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);  in davinci_mcasp_set_dai_fmt()
600 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL);  in davinci_mcasp_set_dai_fmt()
677 			mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG,  in davinci_mcasp_set_sysclk()
679 			mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG,  in davinci_mcasp_set_sysclk()
880 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS);  in mcasp_common_hw_param()
886 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_REVTCTL_REG, RXDATADMADIS);  in mcasp_common_hw_param()
1027 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC);  in mcasp_i2s_hw_param()
1064 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXSEL);  in mcasp_dit_hw_param()
1077 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS);  in mcasp_dit_hw_param()
2127 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(offset));  in davinci_mcasp_gpio_free()
2130 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_PFUNC_REG, BIT(offset));  in davinci_mcasp_gpio_free()
2144 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDOUT_REG, BIT(offset));  in davinci_mcasp_gpio_direction_out()
2166 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDOUT_REG, BIT(offset));  in davinci_mcasp_gpio_set()
2178 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(offset));  in davinci_mcasp_gpio_direction_in()