39 	struct tegra20_i2s *i2s = dev_get_drvdata(dev);  in tegra20_i2s_runtime_suspend()  local
41 	regcache_cache_only(i2s->regmap, true);  in tegra20_i2s_runtime_suspend()
43 	clk_disable_unprepare(i2s->clk_i2s);  in tegra20_i2s_runtime_suspend()
50 	struct tegra20_i2s *i2s = dev_get_drvdata(dev);  in tegra20_i2s_runtime_resume()  local
53 	ret = reset_control_assert(i2s->reset);  in tegra20_i2s_runtime_resume()
57 	ret = clk_prepare_enable(i2s->clk_i2s);  in tegra20_i2s_runtime_resume()
65 	ret = reset_control_deassert(i2s->reset);  in tegra20_i2s_runtime_resume()
69 	regcache_cache_only(i2s->regmap, false);  in tegra20_i2s_runtime_resume()
70 	regcache_mark_dirty(i2s->regmap);  in tegra20_i2s_runtime_resume()
72 	ret = regcache_sync(i2s->regmap);  in tegra20_i2s_runtime_resume()
79 	clk_disable_unprepare(i2s->clk_i2s);  in tegra20_i2s_runtime_resume()
87 	struct tegra20_i2s *i2s = snd_soc_dai_get_drvdata(dai);  in tegra20_i2s_set_fmt()  local
135 	regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL, mask, val);  in tegra20_i2s_set_fmt()
145 	struct tegra20_i2s *i2s = snd_soc_dai_get_drvdata(dai);  in tegra20_i2s_hw_params()  local
170 	regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL, mask, val);  in tegra20_i2s_hw_params()
177 	ret = clk_set_rate(i2s->clk_i2s, i2sclock);  in tegra20_i2s_hw_params()
191 	regmap_write(i2s->regmap, TEGRA20_I2S_TIMING, val);  in tegra20_i2s_hw_params()
193 	regmap_write(i2s->regmap, TEGRA20_I2S_FIFO_SCR,  in tegra20_i2s_hw_params()
200 static void tegra20_i2s_start_playback(struct tegra20_i2s *i2s)  in tegra20_i2s_start_playback()  argument
202 	regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL,  in tegra20_i2s_start_playback()
207 static void tegra20_i2s_stop_playback(struct tegra20_i2s *i2s)  in tegra20_i2s_stop_playback()  argument
209 	regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL,  in tegra20_i2s_stop_playback()
213 static void tegra20_i2s_start_capture(struct tegra20_i2s *i2s)  in tegra20_i2s_start_capture()  argument
215 	regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL,  in tegra20_i2s_start_capture()
220 static void tegra20_i2s_stop_capture(struct tegra20_i2s *i2s)  in tegra20_i2s_stop_capture()  argument
222 	regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL,  in tegra20_i2s_stop_capture()
229 	struct tegra20_i2s *i2s = snd_soc_dai_get_drvdata(dai);  in tegra20_i2s_trigger()  local
236 			tegra20_i2s_start_playback(i2s);  in tegra20_i2s_trigger()
238 			tegra20_i2s_start_capture(i2s);  in tegra20_i2s_trigger()
244 			tegra20_i2s_stop_playback(i2s);  in tegra20_i2s_trigger()
246 			tegra20_i2s_stop_capture(i2s);  in tegra20_i2s_trigger()
257 	struct tegra20_i2s *i2s = snd_soc_dai_get_drvdata(dai);  in tegra20_i2s_probe()  local
259 	dai->capture_dma_data = &i2s->capture_dma_data;  in tegra20_i2s_probe()
260 	dai->playback_dma_data = &i2s->playback_dma_data;  in tegra20_i2s_probe()
352 	struct tegra20_i2s *i2s;  in tegra20_i2s_platform_probe()  local
357 	i2s = devm_kzalloc(&pdev->dev, sizeof(struct tegra20_i2s), GFP_KERNEL);  in tegra20_i2s_platform_probe()
358 	if (!i2s) {  in tegra20_i2s_platform_probe()
362 	dev_set_drvdata(&pdev->dev, i2s);  in tegra20_i2s_platform_probe()
364 	i2s->dai = tegra20_i2s_dai_template;  in tegra20_i2s_platform_probe()
365 	i2s->dai.name = dev_name(&pdev->dev);  in tegra20_i2s_platform_probe()
367 	i2s->reset = devm_reset_control_get_exclusive(&pdev->dev, "i2s");  in tegra20_i2s_platform_probe()
368 	if (IS_ERR(i2s->reset)) {  in tegra20_i2s_platform_probe()
370 		return PTR_ERR(i2s->reset);  in tegra20_i2s_platform_probe()
373 	i2s->clk_i2s = devm_clk_get(&pdev->dev, NULL);  in tegra20_i2s_platform_probe()
374 	if (IS_ERR(i2s->clk_i2s)) {  in tegra20_i2s_platform_probe()
376 		ret = PTR_ERR(i2s->clk_i2s);  in tegra20_i2s_platform_probe()
386 	i2s->regmap = devm_regmap_init_mmio(&pdev->dev, regs,  in tegra20_i2s_platform_probe()
388 	if (IS_ERR(i2s->regmap)) {  in tegra20_i2s_platform_probe()
390 		ret = PTR_ERR(i2s->regmap);  in tegra20_i2s_platform_probe()
394 	i2s->capture_dma_data.addr = mem->start + TEGRA20_I2S_FIFO2;  in tegra20_i2s_platform_probe()
395 	i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;  in tegra20_i2s_platform_probe()
396 	i2s->capture_dma_data.maxburst = 4;  in tegra20_i2s_platform_probe()
398 	i2s->playback_dma_data.addr = mem->start + TEGRA20_I2S_FIFO1;  in tegra20_i2s_platform_probe()
399 	i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;  in tegra20_i2s_platform_probe()
400 	i2s->playback_dma_data.maxburst = 4;  in tegra20_i2s_platform_probe()
405 					 &i2s->dai, 1);  in tegra20_i2s_platform_probe()