Lines Matching +full:4 +full:x2
45 #define TAS5720_SAIF_RIGHTJ_18BIT (0x2)
53 #define TAS5720_MUTE BIT(4)
57 #define TAS5720_PWM_RATE_6_3_FSYNC (0x0 << 4)
58 #define TAS5720_PWM_RATE_8_4_FSYNC (0x1 << 4)
59 #define TAS5720_PWM_RATE_10_5_FSYNC (0x2 << 4)
60 #define TAS5720_PWM_RATE_12_6_FSYNC (0x3 << 4)
61 #define TAS5720_PWM_RATE_14_7_FSYNC (0x4 << 4)
62 #define TAS5720_PWM_RATE_16_8_FSYNC (0x5 << 4)
63 #define TAS5720_PWM_RATE_20_10_FSYNC (0x6 << 4)
64 #define TAS5720_PWM_RATE_24_12_FSYNC (0x7 << 4)
65 #define TAS5720_PWM_RATE_MASK GENMASK(6, 4)
68 #define TAS5720_ANALOG_GAIN_23_5DBV (0x2 << 2)
71 #define TAS5720_ANALOG_GAIN_SHIFT (0x2)
74 #define TAS5720_OC_THRESH_100PCT (0x0 << 4)
75 #define TAS5720_OC_THRESH_75PCT (0x1 << 4)
76 #define TAS5720_OC_THRESH_50PCT (0x2 << 4)
77 #define TAS5720_OC_THRESH_25PCT (0x3 << 4)
78 #define TAS5720_OC_THRESH_MASK GENMASK(5, 4)
87 #define TAS5720_CLIP1_SHIFT (0x2)
92 #define TAS5722_HPF_14_9HZ (0x2 << 5)
101 #define TAS5722_AUTO_SLEEP_65536LR (0x2 << 3)
103 #define TAS5722_AUTO_SLEEP_MASK GENMASK(4, 3)