Lines Matching +full:vco +full:- +full:hz
1 // SPDX-License-Identifier: GPL-2.0-only
8 * Co-author: Meng-Huang Kuo <mhkuo@nuvoton.com>
34 #define NUVOTON_CODEC_DAI "nau8825-hifi"
238 * nau8825_sema_acquire - acquire the semaphore of nau88l25
248 * this function returns -ETIME. If the sleep is interrupted by a signal,
249 * this function will return -EINTR. It returns 0 if the semaphore was
261 ret = down_timeout(&nau8825->xtalk_sem, timeout); in nau8825_sema_acquire()
263 dev_warn(nau8825->dev, "Acquire semaphore timeout\n"); in nau8825_sema_acquire()
265 ret = down_trylock(&nau8825->xtalk_sem); in nau8825_sema_acquire()
267 dev_warn(nau8825->dev, "Acquire semaphore fail\n"); in nau8825_sema_acquire()
274 * nau8825_sema_release - release the semaphore of nau88l25
282 up(&nau8825->xtalk_sem); in nau8825_sema_release()
286 * nau8825_sema_reset - reset the semaphore for nau88l25
294 nau8825->xtalk_sem.count = 1; in nau8825_sema_reset()
298 * nau8825_hpvol_ramp - Ramp up the headphone volume change gradually to target level.
305 * The headphone volume is from 0dB to minimum -54dB and -1dB per step.
326 /* only handle volume from 0dB to minimum -54dB */ in nau8825_hpvol_ramp()
334 value = to - volume + from; in nau8825_hpvol_ramp()
335 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSVOL_CTRL, in nau8825_hpvol_ramp()
344 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSVOL_CTRL, in nau8825_hpvol_ramp()
350 * nau8825_intlog10_dec3 - Computes log10 of a value
352 * dvb-math. The source code locates as the following.
353 * Linux/drivers/media/dvb-core/dvb_math.c
364 msb = fls(value) - 1; in nau8825_intlog10_dec3()
372 * 0x00231f56 -> 0x8C7D5800 in nau8825_intlog10_dec3()
373 * the result is y * 2^31 -> "significand" in nau8825_intlog10_dec3()
379 significand = value << (31 - msb); in nau8825_intlog10_dec3()
391 * (error / 0x800000) * (logtable_next - logtable_current) in nau8825_intlog10_dec3()
397 ((logtable[(logentry + 1) & 0xff] - in nau8825_intlog10_dec3()
412 * nau8825_xtalk_sidetone - computes cross talk suppression sidetone gain.
434 gain = (sig_org - sig_cros) * 20 + GAIN_AUGMENT; in nau8825_xtalk_sidetone()
436 gain = (sig_cros - sig_org) * 20 + GAIN_AUGMENT; in nau8825_xtalk_sidetone()
437 sidetone = SIDETONE_BASE - gain * 2; in nau8825_xtalk_sidetone()
450 return -EINVAL; in nau8825_xtalk_baktab_index_by_reg()
457 if (nau8825->xtalk_baktab_initialized) in nau8825_xtalk_backup()
462 regmap_read(nau8825->regmap, nau8825_xtalk_baktab[i].reg, in nau8825_xtalk_backup()
465 nau8825->xtalk_baktab_initialized = true; in nau8825_xtalk_backup()
472 if (!nau8825->xtalk_baktab_initialized) in nau8825_xtalk_restore()
489 regmap_write(nau8825->regmap, nau8825_xtalk_baktab[i].reg, in nau8825_xtalk_restore()
493 nau8825->xtalk_baktab_initialized = false; in nau8825_xtalk_restore()
499 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL, in nau8825_xtalk_prepare_dac()
508 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_xtalk_prepare_dac()
512 regmap_update_bits(nau8825->regmap, NAU8825_REG_RDAC, in nau8825_xtalk_prepare_dac()
517 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL, in nau8825_xtalk_prepare_dac()
522 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL, in nau8825_xtalk_prepare_dac()
526 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSD_CTRL, in nau8825_xtalk_prepare_dac()
529 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST, in nau8825_xtalk_prepare_dac()
532 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLASSG_CTRL, in nau8825_xtalk_prepare_dac()
540 regmap_update_bits(nau8825->regmap, NAU8825_REG_ANALOG_ADC_2, in nau8825_xtalk_prepare_adc()
548 regmap_write(nau8825->regmap, NAU8825_REG_FLL1, 0x0); in nau8825_xtalk_clock()
549 regmap_write(nau8825->regmap, NAU8825_REG_FLL2, 0x3126); in nau8825_xtalk_clock()
550 regmap_write(nau8825->regmap, NAU8825_REG_FLL3, 0x0008); in nau8825_xtalk_clock()
551 regmap_write(nau8825->regmap, NAU8825_REG_FLL4, 0x0010); in nau8825_xtalk_clock()
552 regmap_write(nau8825->regmap, NAU8825_REG_FLL5, 0x0); in nau8825_xtalk_clock()
553 regmap_write(nau8825->regmap, NAU8825_REG_FLL6, 0x6000); in nau8825_xtalk_clock()
554 /* Enable internal VCO clock for detection signal generated */ in nau8825_xtalk_clock()
555 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_xtalk_clock()
557 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6, NAU8825_DCO_EN, in nau8825_xtalk_clock()
562 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_xtalk_clock()
564 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL1, in nau8825_xtalk_clock()
575 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, in nau8825_xtalk_prepare()
583 if (index != -EINVAL) { in nau8825_xtalk_prepare()
592 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACL_CTRL, in nau8825_xtalk_prepare()
595 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACR_CTRL, in nau8825_xtalk_prepare()
598 /* Config cross talk parameters and generate the 23Hz sine wave with in nau8825_xtalk_prepare()
601 regmap_update_bits(nau8825->regmap, NAU8825_REG_IMM_MODE_CTRL, in nau8825_xtalk_prepare()
607 regmap_update_bits(nau8825->regmap, in nau8825_xtalk_prepare()
610 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_xtalk_prepare()
617 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST, in nau8825_xtalk_clean_dac()
620 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSD_CTRL, in nau8825_xtalk_clean_dac()
624 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_xtalk_clean_dac()
628 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_xtalk_clean_dac()
632 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL, in nau8825_xtalk_clean_dac()
634 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL, in nau8825_xtalk_clean_dac()
638 regmap_update_bits(nau8825->regmap, NAU8825_REG_RDAC, in nau8825_xtalk_clean_dac()
641 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_xtalk_clean_dac()
644 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL, in nau8825_xtalk_clean_dac()
647 if (!nau8825->irq) in nau8825_xtalk_clean_dac()
648 regmap_update_bits(nau8825->regmap, in nau8825_xtalk_clean_dac()
655 regmap_update_bits(nau8825->regmap, NAU8825_REG_ANALOG_ADC_2, in nau8825_xtalk_clean_adc()
661 /* Enable internal VCO needed for interruptions */ in nau8825_xtalk_clean()
666 regmap_write(nau8825->regmap, NAU8825_REG_IMM_MODE_CTRL, 0); in nau8825_xtalk_clean()
668 regmap_update_bits(nau8825->regmap, NAU8825_REG_INTERRUPT_MASK, in nau8825_xtalk_clean()
671 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, in nau8825_xtalk_clean()
681 regmap_update_bits(nau8825->regmap, NAU8825_REG_ADC_DGAIN_CTRL, in nau8825_xtalk_imm_start()
686 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_xtalk_imm_start()
689 switch (nau8825->xtalk_state) { in nau8825_xtalk_imm_start()
692 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_xtalk_imm_start()
698 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_xtalk_imm_start()
707 regmap_update_bits(nau8825->regmap, NAU8825_REG_IMM_MODE_CTRL, in nau8825_xtalk_imm_start()
714 regmap_update_bits(nau8825->regmap, in nau8825_xtalk_imm_stop()
721 * sending a 23Hz -24dBV sine wave into the headset output DAC and through
723 * sense which measures the attenuated 23Hz signal and passing the output to
742 switch (nau8825->xtalk_state) { in nau8825_xtalk_measure()
750 nau8825->xtalk_state = NAU8825_XTALK_HPR_R2L; in nau8825_xtalk_measure()
757 regmap_read(nau8825->regmap, NAU8825_REG_IMM_RMS_L, in nau8825_xtalk_measure()
758 &nau8825->imp_rms[NAU8825_XTALK_HPR_R2L]); in nau8825_xtalk_measure()
759 dev_dbg(nau8825->dev, "HPR_R2L imm: %x\n", in nau8825_xtalk_measure()
760 nau8825->imp_rms[NAU8825_XTALK_HPR_R2L]); in nau8825_xtalk_measure()
761 /* Disable then re-enable IMM mode to update */ in nau8825_xtalk_measure()
764 nau8825->xtalk_state = NAU8825_XTALK_HPL_R2L; in nau8825_xtalk_measure()
774 regmap_read(nau8825->regmap, NAU8825_REG_IMM_RMS_L, in nau8825_xtalk_measure()
775 &nau8825->imp_rms[NAU8825_XTALK_HPL_R2L]); in nau8825_xtalk_measure()
776 dev_dbg(nau8825->dev, "HPL_R2L imm: %x\n", in nau8825_xtalk_measure()
777 nau8825->imp_rms[NAU8825_XTALK_HPL_R2L]); in nau8825_xtalk_measure()
780 nau8825->xtalk_state = NAU8825_XTALK_IMM; in nau8825_xtalk_measure()
784 * signal level vlues are ready. The side tone gain is deter- in nau8825_xtalk_measure()
789 nau8825->imp_rms[NAU8825_XTALK_HPR_R2L], in nau8825_xtalk_measure()
790 nau8825->imp_rms[NAU8825_XTALK_HPL_R2L]); in nau8825_xtalk_measure()
791 dev_dbg(nau8825->dev, "cross talk sidetone: %x\n", sidetone); in nau8825_xtalk_measure()
792 regmap_write(nau8825->regmap, NAU8825_REG_DAC_DGAIN_CTRL, in nau8825_xtalk_measure()
795 nau8825->xtalk_state = NAU8825_XTALK_DONE; in nau8825_xtalk_measure()
811 if (nau8825->xtalk_state == NAU8825_XTALK_IMM) in nau8825_xtalk_work()
820 if (nau8825->xtalk_state == NAU8825_XTALK_DONE) { in nau8825_xtalk_work()
821 snd_soc_jack_report(nau8825->jack, nau8825->xtalk_event, in nau8825_xtalk_work()
822 nau8825->xtalk_event_mask); in nau8825_xtalk_work()
824 nau8825->xtalk_protect = false; in nau8825_xtalk_work()
834 if (nau8825->xtalk_enable && nau8825->xtalk_state != in nau8825_xtalk_cancel()
836 cancel_work_sync(&nau8825->xtalk_work); in nau8825_xtalk_cancel()
841 nau8825->xtalk_state = NAU8825_XTALK_DONE; in nau8825_xtalk_cancel()
842 nau8825->xtalk_protect = false; in nau8825_xtalk_cancel()
916 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in nau8825_adc_event()
922 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL, in nau8825_adc_event()
926 if (!nau8825->irq) in nau8825_adc_event()
927 regmap_update_bits(nau8825->regmap, in nau8825_adc_event()
931 return -EINVAL; in nau8825_adc_event()
940 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in nau8825_pump_event()
947 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_pump_event()
951 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_pump_event()
955 return -EINVAL; in nau8825_pump_event()
964 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in nau8825_output_dac_event()
970 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_output_dac_event()
974 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_output_dac_event()
978 return -EINVAL; in nau8825_output_dac_event()
988 struct soc_bytes_ext *params = (void *)kcontrol->private_value; in nau8825_biq_coeff_get()
990 if (!component->regmap) in nau8825_biq_coeff_get()
991 return -EINVAL; in nau8825_biq_coeff_get()
993 regmap_raw_read(component->regmap, NAU8825_REG_BIQ_COF1, in nau8825_biq_coeff_get()
994 ucontrol->value.bytes.data, params->max); in nau8825_biq_coeff_get()
1002 struct soc_bytes_ext *params = (void *)kcontrol->private_value; in nau8825_biq_coeff_put()
1005 if (!component->regmap) in nau8825_biq_coeff_put()
1006 return -EINVAL; in nau8825_biq_coeff_put()
1008 data = kmemdup(ucontrol->value.bytes.data, in nau8825_biq_coeff_put()
1009 params->max, GFP_KERNEL | GFP_DMA); in nau8825_biq_coeff_put()
1011 return -ENOMEM; in nau8825_biq_coeff_put()
1013 regmap_update_bits(component->regmap, NAU8825_REG_BIQ_CTRL, in nau8825_biq_coeff_put()
1015 regmap_raw_write(component->regmap, NAU8825_REG_BIQ_COF1, in nau8825_biq_coeff_put()
1016 data, params->max); in nau8825_biq_coeff_put()
1017 regmap_update_bits(component->regmap, NAU8825_REG_BIQ_CTRL, in nau8825_biq_coeff_put()
1048 static const DECLARE_TLV_DB_MINMAX_MUTE(adc_vol_tlv, -10300, 2400);
1049 static const DECLARE_TLV_DB_MINMAX_MUTE(sidetone_vol_tlv, -4200, 0);
1050 static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -5400, 0);
1051 static const DECLARE_TLV_DB_MINMAX(fepga_gain_tlv, -100, 3600);
1052 static const DECLARE_TLV_DB_MINMAX_MUTE(crosstalk_vol_tlv, -9600, 2400);
1161 /* HPOL/R are ungrounded by disabling 16 Ohm pull-downs on playback */
1226 return -EINVAL; in nau8825_clock_check()
1230 return -EINVAL; in nau8825_clock_check()
1235 dev_err(nau8825->dev, "exceed the maximum frequency of CLK_ADC or CLK_DAC\n"); in nau8825_clock_check()
1236 return -EINVAL; in nau8825_clock_check()
1246 struct snd_soc_component *component = dai->component; in nau8825_hw_params()
1250 nau8825_sema_acquire(nau8825, 3 * HZ); in nau8825_hw_params()
1258 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { in nau8825_hw_params()
1259 regmap_read(nau8825->regmap, NAU8825_REG_DAC_CTRL1, &osr); in nau8825_hw_params()
1261 if (nau8825_clock_check(nau8825, substream->stream, in nau8825_hw_params()
1264 return -EINVAL; in nau8825_hw_params()
1266 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_hw_params()
1270 regmap_read(nau8825->regmap, NAU8825_REG_ADC_RATE, &osr); in nau8825_hw_params()
1272 if (nau8825_clock_check(nau8825, substream->stream, in nau8825_hw_params()
1275 return -EINVAL; in nau8825_hw_params()
1277 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_hw_params()
1283 regmap_read(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, &ctrl_val); in nau8825_hw_params()
1295 return -EINVAL; in nau8825_hw_params()
1297 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, in nau8825_hw_params()
1317 return -EINVAL; in nau8825_hw_params()
1320 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL1, in nau8825_hw_params()
1331 struct snd_soc_component *component = codec_dai->component; in nau8825_set_dai_fmt()
1342 return -EINVAL; in nau8825_set_dai_fmt()
1352 return -EINVAL; in nau8825_set_dai_fmt()
1373 return -EINVAL; in nau8825_set_dai_fmt()
1376 nau8825_sema_acquire(nau8825, 3 * HZ); in nau8825_set_dai_fmt()
1378 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL1, in nau8825_set_dai_fmt()
1382 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, in nau8825_set_dai_fmt()
1401 .name = "nau8825-hifi",
1420 * nau8825_enable_jack_detect - Specify a jack for event reporting
1433 struct regmap *regmap = nau8825->regmap; in nau8825_enable_jack_detect()
1435 nau8825->jack = jack; in nau8825_enable_jack_detect()
1480 /* Reset the intrruption status from rightmost bit if the corres- in nau8825_int_status_clear_all()
1494 struct snd_soc_dapm_context *dapm = nau8825->dapm; in nau8825_eject_jack()
1495 struct regmap *regmap = nau8825->regmap; in nau8825_eject_jack()
1513 /* Enable the insertion interruption, disable the ejection inter- in nau8825_eject_jack()
1514 * ruption, and then bypass de-bounce circuit. in nau8825_eject_jack()
1538 struct regmap *regmap = nau8825->regmap; in nau8825_setup_auto_irq()
1546 /* Enable internal VCO needed for interruptions */ in nau8825_setup_auto_irq()
1563 /* Not bypass de-bounce circuit */ in nau8825_setup_auto_irq()
1597 struct regmap *regmap = nau8825->regmap; in nau8825_jack_insert()
1598 struct snd_soc_dapm_context *dapm = nau8825->dapm; in nau8825_jack_insert()
1606 nau8825->high_imped = true; in nau8825_jack_insert()
1608 nau8825->high_imped = false; in nau8825_jack_insert()
1616 dev_dbg(nau8825->dev, "OMTP (micgnd1) mic connected\n"); in nau8825_jack_insert()
1636 dev_dbg(nau8825->dev, "CTIA (micgnd2) mic connected\n"); in nau8825_jack_insert()
1657 dev_err(nau8825->dev, "detection error; disable mic function\n"); in nau8825_jack_insert()
1675 struct regmap *regmap = nau8825->regmap; in nau8825_interrupt()
1679 dev_err(nau8825->dev, "failed to read irq status\n"); in nau8825_interrupt()
1696 * lower 8 bits - for long pressed buttons in nau8825_interrupt()
1698 nau8825->button_pressed = nau8825_button_decode( in nau8825_interrupt()
1701 event |= nau8825->button_pressed; in nau8825_interrupt()
1710 if (nau8825->xtalk_enable && !nau8825->high_imped) { in nau8825_interrupt()
1714 if (!nau8825->xtalk_protect) { in nau8825_interrupt()
1715 /* Raise protection for cross talk de- in nau8825_interrupt()
1717 * The driver has to cancel the pro- in nau8825_interrupt()
1722 nau8825->xtalk_protect = true; in nau8825_interrupt()
1725 nau8825->xtalk_protect = false; in nau8825_interrupt()
1728 if (nau8825->xtalk_protect) { in nau8825_interrupt()
1729 nau8825->xtalk_state = in nau8825_interrupt()
1731 schedule_work(&nau8825->xtalk_work); in nau8825_interrupt()
1738 if (nau8825->xtalk_protect) { in nau8825_interrupt()
1740 nau8825->xtalk_protect = false; in nau8825_interrupt()
1744 dev_warn(nau8825->dev, "Headset completion IRQ fired but no headset connected\n"); in nau8825_interrupt()
1754 if (nau8825->xtalk_state == NAU8825_XTALK_PREPARE) { in nau8825_interrupt()
1755 nau8825->xtalk_event = event; in nau8825_interrupt()
1756 nau8825->xtalk_event_mask = event_mask; in nau8825_interrupt()
1760 if (nau8825->xtalk_enable && nau8825->xtalk_protect) in nau8825_interrupt()
1761 schedule_work(&nau8825->xtalk_work); in nau8825_interrupt()
1795 if (event_mask && nau8825->xtalk_state == NAU8825_XTALK_DONE) in nau8825_interrupt()
1796 snd_soc_jack_report(nau8825->jack, event, event_mask); in nau8825_interrupt()
1803 struct regmap *regmap = nau8825->regmap; in nau8825_setup_buttons()
1807 nau8825->sar_voltage << NAU8825_SAR_TRACKING_GAIN_SFT); in nau8825_setup_buttons()
1810 nau8825->sar_compare_time << NAU8825_SAR_COMPARE_TIME_SFT); in nau8825_setup_buttons()
1813 nau8825->sar_sampling_time << NAU8825_SAR_SAMPLING_TIME_SFT); in nau8825_setup_buttons()
1817 (nau8825->sar_threshold_num - 1) << NAU8825_KEYDET_LEVELS_NR_SFT); in nau8825_setup_buttons()
1820 nau8825->sar_hysteresis << NAU8825_KEYDET_HYSTERESIS_SFT); in nau8825_setup_buttons()
1823 nau8825->key_debounce << NAU8825_KEYDET_SHORTKEY_DEBOUNCE_SFT); in nau8825_setup_buttons()
1826 (nau8825->sar_threshold[0] << 8) | nau8825->sar_threshold[1]); in nau8825_setup_buttons()
1828 (nau8825->sar_threshold[2] << 8) | nau8825->sar_threshold[3]); in nau8825_setup_buttons()
1830 (nau8825->sar_threshold[4] << 8) | nau8825->sar_threshold[5]); in nau8825_setup_buttons()
1832 (nau8825->sar_threshold[6] << 8) | nau8825->sar_threshold[7]); in nau8825_setup_buttons()
1842 struct regmap *regmap = nau8825->regmap; in nau8825_init_regs()
1847 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_init_regs()
1849 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST, in nau8825_init_regs()
1855 nau8825->vref_impedance << NAU8825_BIAS_VMID_SEL_SFT); in nau8825_init_regs()
1865 nau8825->jkdet_enable ? 0 : NAU8825_JKDET_OUTPUT_EN); in nau8825_init_regs()
1868 nau8825->jkdet_pull_enable ? 0 : NAU8825_JKDET_PULL_EN); in nau8825_init_regs()
1871 nau8825->jkdet_pull_up ? NAU8825_JKDET_PULL_UP : 0); in nau8825_init_regs()
1874 /* jkdet_polarity - 1 is for active-low */ in nau8825_init_regs()
1875 nau8825->jkdet_polarity ? 0 : NAU8825_JACK_POLARITY); in nau8825_init_regs()
1879 nau8825->jack_insert_debounce << NAU8825_JACK_INSERT_DEBOUNCE_SFT); in nau8825_init_regs()
1882 nau8825->jack_eject_debounce << NAU8825_JACK_EJECT_DEBOUNCE_SFT); in nau8825_init_regs()
1888 /* Mask unneeded IRQs: 1 - disable, 0 - enable */ in nau8825_init_regs()
1892 NAU8825_MICBIAS_VOLTAGE_MASK, nau8825->micbias_voltage); in nau8825_init_regs()
1894 if (nau8825->sar_threshold_num) in nau8825_init_regs()
1913 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_init_regs()
1935 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACL_CTRL, in nau8825_init_regs()
1937 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACR_CTRL, in nau8825_init_regs()
1963 nau8825->dapm = dapm; in nau8825_component_probe()
1977 * nau8825_calc_fll_param - Calculate FLL parameters.
1993 * freq_in by 1, 2, 4, or 8 using FLL pre-scalar. in nau8825_calc_fll_param()
2002 return -EINVAL; in nau8825_calc_fll_param()
2003 fll_param->clk_ref_div = fll_pre_scalar[i].val; in nau8825_calc_fll_param()
2011 return -EINVAL; in nau8825_calc_fll_param()
2012 fll_param->ratio = fll_ratio[i].val; in nau8825_calc_fll_param()
2015 * FDCO must be within the 90MHz - 124MHz or the FFL cannot be in nau8825_calc_fll_param()
2030 return -EINVAL; in nau8825_calc_fll_param()
2031 fll_param->mclk_src = mclk_src_scaling[fvco_sel].val; in nau8825_calc_fll_param()
2033 /* Calculate the FLL 10-bit integer input and the FLL 16-bit fractional in nau8825_calc_fll_param()
2036 fvco = div_u64(fvco_max << 16, fref * fll_param->ratio); in nau8825_calc_fll_param()
2037 fll_param->fll_int = (fvco >> 16) & 0x3FF; in nau8825_calc_fll_param()
2038 fll_param->fll_frac = fvco & 0xFFFF; in nau8825_calc_fll_param()
2045 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_fll_apply()
2047 NAU8825_CLK_SRC_MCLK | fll_param->mclk_src); in nau8825_fll_apply()
2049 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL1, in nau8825_fll_apply()
2051 fll_param->ratio | (0x6 << NAU8825_ICTRL_LATCH_SFT)); in nau8825_fll_apply()
2052 /* FLL 16-bit fractional input */ in nau8825_fll_apply()
2053 regmap_write(nau8825->regmap, NAU8825_REG_FLL2, fll_param->fll_frac); in nau8825_fll_apply()
2054 /* FLL 10-bit integer input */ in nau8825_fll_apply()
2055 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL3, in nau8825_fll_apply()
2056 NAU8825_FLL_INTEGER_MASK, fll_param->fll_int); in nau8825_fll_apply()
2057 /* FLL pre-scaler */ in nau8825_fll_apply()
2058 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL4, in nau8825_fll_apply()
2060 fll_param->clk_ref_div << NAU8825_FLL_REF_DIV_SFT); in nau8825_fll_apply()
2061 /* select divided VCO input */ in nau8825_fll_apply()
2062 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5, in nau8825_fll_apply()
2064 /* Disable free-running mode */ in nau8825_fll_apply()
2065 regmap_update_bits(nau8825->regmap, in nau8825_fll_apply()
2067 if (fll_param->fll_frac) { in nau8825_fll_apply()
2069 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5, in nau8825_fll_apply()
2074 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6, in nau8825_fll_apply()
2079 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5, in nau8825_fll_apply()
2082 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6, in nau8825_fll_apply()
2098 dev_err(component->dev, "Unsupported input clock %d\n", freq_in); in nau8825_set_pll()
2101 dev_dbg(component->dev, "mclk_src=%x ratio=%x fll_frac=%x fll_int=%x clk_ref_div=%x\n", in nau8825_set_pll()
2107 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_set_pll()
2116 nau8825->mclk = devm_clk_get(nau8825->dev, "mclk"); in nau8825_mclk_prepare()
2117 if (IS_ERR(nau8825->mclk)) { in nau8825_mclk_prepare()
2118 dev_info(nau8825->dev, "No 'mclk' clock found, assume MCLK is managed externally"); in nau8825_mclk_prepare()
2122 if (!nau8825->mclk_freq) { in nau8825_mclk_prepare()
2123 ret = clk_prepare_enable(nau8825->mclk); in nau8825_mclk_prepare()
2125 dev_err(nau8825->dev, "Unable to prepare codec mclk\n"); in nau8825_mclk_prepare()
2130 if (nau8825->mclk_freq != freq) { in nau8825_mclk_prepare()
2131 freq = clk_round_rate(nau8825->mclk, freq); in nau8825_mclk_prepare()
2132 ret = clk_set_rate(nau8825->mclk, freq); in nau8825_mclk_prepare()
2134 dev_err(nau8825->dev, "Unable to set mclk rate\n"); in nau8825_mclk_prepare()
2137 nau8825->mclk_freq = freq; in nau8825_mclk_prepare()
2157 struct regmap *regmap = nau8825->regmap; in nau8825_configure_sysclk()
2162 /* Clock provided externally and disable internal VCO clock */ in nau8825_configure_sysclk()
2164 if (nau8825->mclk_freq) { in nau8825_configure_sysclk()
2165 clk_disable_unprepare(nau8825->mclk); in nau8825_configure_sysclk()
2166 nau8825->mclk_freq = 0; in nau8825_configure_sysclk()
2172 * interrupt handler. In order to avoid the playback inter- in nau8825_configure_sysclk()
2176 nau8825_sema_acquire(nau8825, 3 * HZ); in nau8825_configure_sysclk()
2190 if (nau8825_is_jack_inserted(nau8825->regmap)) { in nau8825_configure_sysclk()
2195 /* Decrease the VCO frequency and make DSP operate in nau8825_configure_sysclk()
2210 dev_warn(nau8825->dev, "Disable clock for power saving when no headset connected\n"); in nau8825_configure_sysclk()
2212 if (nau8825->mclk_freq) { in nau8825_configure_sysclk()
2213 clk_disable_unprepare(nau8825->mclk); in nau8825_configure_sysclk()
2214 nau8825->mclk_freq = 0; in nau8825_configure_sysclk()
2220 * interrupt handler. In order to avoid the playback inter- in nau8825_configure_sysclk()
2224 nau8825_sema_acquire(nau8825, 3 * HZ); in nau8825_configure_sysclk()
2242 * interrupt handler. In order to avoid the playback inter- in nau8825_configure_sysclk()
2246 nau8825_sema_acquire(nau8825, 3 * HZ); in nau8825_configure_sysclk()
2260 if (nau8825->mclk_freq) { in nau8825_configure_sysclk()
2261 clk_disable_unprepare(nau8825->mclk); in nau8825_configure_sysclk()
2262 nau8825->mclk_freq = 0; in nau8825_configure_sysclk()
2268 * interrupt handler. In order to avoid the playback inter- in nau8825_configure_sysclk()
2272 nau8825_sema_acquire(nau8825, 3 * HZ); in nau8825_configure_sysclk()
2286 if (nau8825->mclk_freq) { in nau8825_configure_sysclk()
2287 clk_disable_unprepare(nau8825->mclk); in nau8825_configure_sysclk()
2288 nau8825->mclk_freq = 0; in nau8825_configure_sysclk()
2293 dev_err(nau8825->dev, "Invalid clock id (%d)\n", clk_id); in nau8825_configure_sysclk()
2294 return -EINVAL; in nau8825_configure_sysclk()
2297 dev_dbg(nau8825->dev, "Sysclk is %dHz and clock id is %d\n", freq, in nau8825_configure_sysclk()
2312 struct regmap *regmap = nau8825->regmap; in nau8825_resume_setup()
2321 * bypass de-bounce circuit. in nau8825_resume_setup()
2350 if (nau8825->mclk_freq) { in nau8825_set_bias_level()
2351 ret = clk_prepare_enable(nau8825->mclk); in nau8825_set_bias_level()
2353 dev_err(nau8825->dev, "Unable to prepare component mclk\n"); in nau8825_set_bias_level()
2365 regmap_update_bits(nau8825->regmap, NAU8825_REG_MIC_BIAS, in nau8825_set_bias_level()
2368 regmap_update_bits(nau8825->regmap, in nau8825_set_bias_level()
2375 regmap_write(nau8825->regmap, in nau8825_set_bias_level()
2378 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL, in nau8825_set_bias_level()
2380 if (nau8825->mclk_freq) in nau8825_set_bias_level()
2381 clk_disable_unprepare(nau8825->mclk); in nau8825_set_bias_level()
2391 disable_irq(nau8825->irq); in nau8825_suspend()
2394 snd_soc_dapm_disable_pin(nau8825->dapm, "SAR"); in nau8825_suspend()
2395 snd_soc_dapm_disable_pin(nau8825->dapm, "MICBIAS"); in nau8825_suspend()
2396 snd_soc_dapm_sync(nau8825->dapm); in nau8825_suspend()
2397 regcache_cache_only(nau8825->regmap, true); in nau8825_suspend()
2398 regcache_mark_dirty(nau8825->regmap); in nau8825_suspend()
2408 regcache_cache_only(nau8825->regmap, false); in nau8825_resume()
2409 regcache_sync(nau8825->regmap); in nau8825_resume()
2410 nau8825->xtalk_protect = true; in nau8825_resume()
2413 nau8825->xtalk_protect = false; in nau8825_resume()
2414 enable_irq(nau8825->irq); in nau8825_resume()
2449 struct device *dev = nau8825->dev; in nau8825_print_device_properties()
2451 dev_dbg(dev, "jkdet-enable: %d\n", nau8825->jkdet_enable); in nau8825_print_device_properties()
2452 dev_dbg(dev, "jkdet-pull-enable: %d\n", nau8825->jkdet_pull_enable); in nau8825_print_device_properties()
2453 dev_dbg(dev, "jkdet-pull-up: %d\n", nau8825->jkdet_pull_up); in nau8825_print_device_properties()
2454 dev_dbg(dev, "jkdet-polarity: %d\n", nau8825->jkdet_polarity); in nau8825_print_device_properties()
2455 dev_dbg(dev, "micbias-voltage: %d\n", nau8825->micbias_voltage); in nau8825_print_device_properties()
2456 dev_dbg(dev, "vref-impedance: %d\n", nau8825->vref_impedance); in nau8825_print_device_properties()
2458 dev_dbg(dev, "sar-threshold-num: %d\n", nau8825->sar_threshold_num); in nau8825_print_device_properties()
2459 for (i = 0; i < nau8825->sar_threshold_num; i++) in nau8825_print_device_properties()
2460 dev_dbg(dev, "sar-threshold[%d]=%d\n", i, in nau8825_print_device_properties()
2461 nau8825->sar_threshold[i]); in nau8825_print_device_properties()
2463 dev_dbg(dev, "sar-hysteresis: %d\n", nau8825->sar_hysteresis); in nau8825_print_device_properties()
2464 dev_dbg(dev, "sar-voltage: %d\n", nau8825->sar_voltage); in nau8825_print_device_properties()
2465 dev_dbg(dev, "sar-compare-time: %d\n", nau8825->sar_compare_time); in nau8825_print_device_properties()
2466 dev_dbg(dev, "sar-sampling-time: %d\n", nau8825->sar_sampling_time); in nau8825_print_device_properties()
2467 dev_dbg(dev, "short-key-debounce: %d\n", nau8825->key_debounce); in nau8825_print_device_properties()
2468 dev_dbg(dev, "jack-insert-debounce: %d\n", in nau8825_print_device_properties()
2469 nau8825->jack_insert_debounce); in nau8825_print_device_properties()
2470 dev_dbg(dev, "jack-eject-debounce: %d\n", in nau8825_print_device_properties()
2471 nau8825->jack_eject_debounce); in nau8825_print_device_properties()
2472 dev_dbg(dev, "crosstalk-enable: %d\n", in nau8825_print_device_properties()
2473 nau8825->xtalk_enable); in nau8825_print_device_properties()
2480 nau8825->jkdet_enable = device_property_read_bool(dev, in nau8825_read_device_properties()
2481 "nuvoton,jkdet-enable"); in nau8825_read_device_properties()
2482 nau8825->jkdet_pull_enable = device_property_read_bool(dev, in nau8825_read_device_properties()
2483 "nuvoton,jkdet-pull-enable"); in nau8825_read_device_properties()
2484 nau8825->jkdet_pull_up = device_property_read_bool(dev, in nau8825_read_device_properties()
2485 "nuvoton,jkdet-pull-up"); in nau8825_read_device_properties()
2486 ret = device_property_read_u32(dev, "nuvoton,jkdet-polarity", in nau8825_read_device_properties()
2487 &nau8825->jkdet_polarity); in nau8825_read_device_properties()
2489 nau8825->jkdet_polarity = 1; in nau8825_read_device_properties()
2490 ret = device_property_read_u32(dev, "nuvoton,micbias-voltage", in nau8825_read_device_properties()
2491 &nau8825->micbias_voltage); in nau8825_read_device_properties()
2493 nau8825->micbias_voltage = 6; in nau8825_read_device_properties()
2494 ret = device_property_read_u32(dev, "nuvoton,vref-impedance", in nau8825_read_device_properties()
2495 &nau8825->vref_impedance); in nau8825_read_device_properties()
2497 nau8825->vref_impedance = 2; in nau8825_read_device_properties()
2498 ret = device_property_read_u32(dev, "nuvoton,sar-threshold-num", in nau8825_read_device_properties()
2499 &nau8825->sar_threshold_num); in nau8825_read_device_properties()
2501 nau8825->sar_threshold_num = 4; in nau8825_read_device_properties()
2502 ret = device_property_read_u32_array(dev, "nuvoton,sar-threshold", in nau8825_read_device_properties()
2503 nau8825->sar_threshold, nau8825->sar_threshold_num); in nau8825_read_device_properties()
2505 nau8825->sar_threshold[0] = 0x08; in nau8825_read_device_properties()
2506 nau8825->sar_threshold[1] = 0x12; in nau8825_read_device_properties()
2507 nau8825->sar_threshold[2] = 0x26; in nau8825_read_device_properties()
2508 nau8825->sar_threshold[3] = 0x73; in nau8825_read_device_properties()
2510 ret = device_property_read_u32(dev, "nuvoton,sar-hysteresis", in nau8825_read_device_properties()
2511 &nau8825->sar_hysteresis); in nau8825_read_device_properties()
2513 nau8825->sar_hysteresis = 0; in nau8825_read_device_properties()
2514 ret = device_property_read_u32(dev, "nuvoton,sar-voltage", in nau8825_read_device_properties()
2515 &nau8825->sar_voltage); in nau8825_read_device_properties()
2517 nau8825->sar_voltage = 6; in nau8825_read_device_properties()
2518 ret = device_property_read_u32(dev, "nuvoton,sar-compare-time", in nau8825_read_device_properties()
2519 &nau8825->sar_compare_time); in nau8825_read_device_properties()
2521 nau8825->sar_compare_time = 1; in nau8825_read_device_properties()
2522 ret = device_property_read_u32(dev, "nuvoton,sar-sampling-time", in nau8825_read_device_properties()
2523 &nau8825->sar_sampling_time); in nau8825_read_device_properties()
2525 nau8825->sar_sampling_time = 1; in nau8825_read_device_properties()
2526 ret = device_property_read_u32(dev, "nuvoton,short-key-debounce", in nau8825_read_device_properties()
2527 &nau8825->key_debounce); in nau8825_read_device_properties()
2529 nau8825->key_debounce = 3; in nau8825_read_device_properties()
2530 ret = device_property_read_u32(dev, "nuvoton,jack-insert-debounce", in nau8825_read_device_properties()
2531 &nau8825->jack_insert_debounce); in nau8825_read_device_properties()
2533 nau8825->jack_insert_debounce = 7; in nau8825_read_device_properties()
2534 ret = device_property_read_u32(dev, "nuvoton,jack-eject-debounce", in nau8825_read_device_properties()
2535 &nau8825->jack_eject_debounce); in nau8825_read_device_properties()
2537 nau8825->jack_eject_debounce = 0; in nau8825_read_device_properties()
2538 nau8825->xtalk_enable = device_property_read_bool(dev, in nau8825_read_device_properties()
2539 "nuvoton,crosstalk-enable"); in nau8825_read_device_properties()
2541 nau8825->mclk = devm_clk_get(dev, "mclk"); in nau8825_read_device_properties()
2542 if (PTR_ERR(nau8825->mclk) == -EPROBE_DEFER) { in nau8825_read_device_properties()
2543 return -EPROBE_DEFER; in nau8825_read_device_properties()
2544 } else if (PTR_ERR(nau8825->mclk) == -ENOENT) { in nau8825_read_device_properties()
2546 nau8825->mclk = NULL; in nau8825_read_device_properties()
2548 } else if (IS_ERR(nau8825->mclk)) { in nau8825_read_device_properties()
2549 return -EINVAL; in nau8825_read_device_properties()
2559 ret = devm_request_threaded_irq(nau8825->dev, nau8825->irq, NULL, in nau8825_setup_irq()
2564 dev_err(nau8825->dev, "Cannot request irq %d (%d)\n", in nau8825_setup_irq()
2565 nau8825->irq, ret); in nau8825_setup_irq()
2575 struct device *dev = &i2c->dev; in nau8825_i2c_probe()
2576 struct nau8825 *nau8825 = dev_get_platdata(&i2c->dev); in nau8825_i2c_probe()
2582 return -ENOMEM; in nau8825_i2c_probe()
2590 nau8825->regmap = devm_regmap_init_i2c(i2c, &nau8825_regmap_config); in nau8825_i2c_probe()
2591 if (IS_ERR(nau8825->regmap)) in nau8825_i2c_probe()
2592 return PTR_ERR(nau8825->regmap); in nau8825_i2c_probe()
2593 nau8825->dev = dev; in nau8825_i2c_probe()
2594 nau8825->irq = i2c->irq; in nau8825_i2c_probe()
2598 nau8825->xtalk_state = NAU8825_XTALK_DONE; in nau8825_i2c_probe()
2599 nau8825->xtalk_protect = false; in nau8825_i2c_probe()
2600 nau8825->xtalk_baktab_initialized = false; in nau8825_i2c_probe()
2601 sema_init(&nau8825->xtalk_sem, 1); in nau8825_i2c_probe()
2602 INIT_WORK(&nau8825->xtalk_work, nau8825_xtalk_work); in nau8825_i2c_probe()
2606 nau8825_reset_chip(nau8825->regmap); in nau8825_i2c_probe()
2607 ret = regmap_read(nau8825->regmap, NAU8825_REG_I2C_DEVICE_ID, &value); in nau8825_i2c_probe()
2616 return -ENODEV; in nau8825_i2c_probe()
2621 if (i2c->irq) in nau8825_i2c_probe()
2624 return devm_snd_soc_register_component(&i2c->dev, in nau8825_i2c_probe()