Lines Matching +full:adc +full:- +full:mux
1 // SPDX-License-Identifier: GPL-2.0
3 // mt6351.c -- mt6351 ALSA SoC audio codec driver
8 #include <linux/dma-mapping.h>
202 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON2, in set_hp_gain_zero()
204 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON2, in set_hp_gain_zero()
225 dev_warn(cmpnt->dev, "%s(), error rate %d, return 3", in get_cap_reg_val()
256 dev_warn(cmpnt->dev, "%s(), error rate %d, return 8", in get_play_reg_val()
266 struct snd_soc_component *cmpnt = dai->component; in mt6351_codec_dai_hw_params()
270 dev_dbg(priv->dev, "%s(), substream->stream %d, rate %d\n", in mt6351_codec_dai_hw_params()
271 __func__, substream->stream, rate); in mt6351_codec_dai_hw_params()
273 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in mt6351_codec_dai_hw_params()
274 priv->dl_rate = rate; in mt6351_codec_dai_hw_params()
275 else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) in mt6351_codec_dai_hw_params()
276 priv->ul_rate = rate; in mt6351_codec_dai_hw_params()
294 .name = "mt6351-snd-codec-aif1",
332 old_idx = priv->ana_gain[AUDIO_ANALOG_VOLUME_HPOUTL]; in hp_gain_ramp_set()
334 idx = priv->ana_gain[AUDIO_ANALOG_VOLUME_HPOUTL]; in hp_gain_ramp_set()
337 dev_dbg(priv->dev, "%s(), idx %d, old_idx %d\n", in hp_gain_ramp_set()
341 offset = idx - old_idx; in hp_gain_ramp_set()
343 offset = old_idx - idx; in hp_gain_ramp_set()
348 reg_idx = idx > old_idx ? reg_idx + 1 : reg_idx - 1; in hp_gain_ramp_set()
352 regmap_update_bits(cmpnt->regmap, in hp_gain_ramp_set()
358 offset--; in hp_gain_ramp_set()
366 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x7 << 8, 0x1 << 8); in hp_zcd_enable()
367 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x1 << 7, 0x0 << 7); in hp_zcd_enable()
370 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x1 << 6, 0x1 << 6); in hp_zcd_enable()
372 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x3 << 4, 0x0 << 4); in hp_zcd_enable()
373 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x7 << 1, 0x5 << 1); in hp_zcd_enable()
374 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x1 << 0, 0x1 << 0); in hp_zcd_enable()
379 regmap_write(cmpnt->regmap, MT6351_ZCD_CON0, 0x0000); in hp_zcd_disable()
382 static const DECLARE_TLV_DB_SCALE(playback_tlv, -1000, 100, 0);
403 /* MUX */
405 /* LOL MUX */
424 /*HP MUX */
453 /* RCV MUX */
472 /* DAC In MUX */
491 /* AIF Out MUX */
502 /* ADC L MUX */
519 SOC_DAPM_ENUM("ADC L Select", adc_left_mux_map_enum);
521 /* ADC R MUX */
538 SOC_DAPM_ENUM("ADC R Select", adc_right_mux_map_enum);
540 /* PGA L MUX */
559 /* PGA R MUX */
582 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_reg_set_clr_event()
586 if (w->on_val) { in mt_reg_set_clr_event()
588 regmap_update_bits(cmpnt->regmap, in mt_reg_set_clr_event()
589 w->reg + REG_STRIDE, in mt_reg_set_clr_event()
590 0x1 << w->shift, in mt_reg_set_clr_event()
591 0x1 << w->shift); in mt_reg_set_clr_event()
594 regmap_update_bits(cmpnt->regmap, in mt_reg_set_clr_event()
595 w->reg + REG_STRIDE * 2, in mt_reg_set_clr_event()
596 0x1 << w->shift, in mt_reg_set_clr_event()
597 0x1 << w->shift); in mt_reg_set_clr_event()
601 if (w->off_val) { in mt_reg_set_clr_event()
603 regmap_update_bits(cmpnt->regmap, in mt_reg_set_clr_event()
604 w->reg + REG_STRIDE, in mt_reg_set_clr_event()
605 0x1 << w->shift, in mt_reg_set_clr_event()
606 0x1 << w->shift); in mt_reg_set_clr_event()
609 regmap_update_bits(cmpnt->regmap, in mt_reg_set_clr_event()
610 w->reg + REG_STRIDE * 2, in mt_reg_set_clr_event()
611 0x1 << w->shift, in mt_reg_set_clr_event()
612 0x1 << w->shift); in mt_reg_set_clr_event()
626 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_ncp_event()
630 regmap_update_bits(cmpnt->regmap, MT6351_AFE_NCP_CFG1, in mt_ncp_event()
633 regmap_update_bits(cmpnt->regmap, MT6351_AFE_NCP_CFG0, in mt_ncp_event()
650 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_sgen_event()
654 regmap_update_bits(cmpnt->regmap, MT6351_AFE_SGEN_CFG0, in mt_sgen_event()
656 regmap_update_bits(cmpnt->regmap, MT6351_AFE_SGEN_CFG1, in mt_sgen_event()
670 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_aif_in_event()
673 dev_dbg(priv->dev, "%s(), event 0x%x, rate %d\n", in mt_aif_in_event()
674 __func__, event, priv->dl_rate); in mt_aif_in_event()
679 regmap_update_bits(cmpnt->regmap, MT6351_AFUNC_AUD_CON2, in mt_aif_in_event()
682 regmap_update_bits(cmpnt->regmap, MT6351_AFUNC_AUD_CON0, in mt_aif_in_event()
685 regmap_update_bits(cmpnt->regmap, MT6351_AFUNC_AUD_CON2, in mt_aif_in_event()
688 regmap_update_bits(cmpnt->regmap, MT6351_AFUNC_AUD_CON2, in mt_aif_in_event()
691 regmap_update_bits(cmpnt->regmap, MT6351_AFE_DL_SDM_CON1, in mt_aif_in_event()
694 regmap_write(cmpnt->regmap, MT6351_AFE_PMIC_NEWIF_CFG0, in mt_aif_in_event()
695 (get_play_reg_val(cmpnt, priv->dl_rate) << 12) | in mt_aif_in_event()
697 regmap_write(cmpnt->regmap, MT6351_AFE_DL_SRC2_CON0_H, in mt_aif_in_event()
698 (get_play_reg_val(cmpnt, priv->dl_rate) << 12) | in mt_aif_in_event()
701 regmap_update_bits(cmpnt->regmap, MT6351_AFE_PMIC_NEWIF_CFG2, in mt_aif_in_event()
715 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_hp_event()
719 dev_dbg(priv->dev, "%s(), event 0x%x, hp_en_counter %d\n", in mt_hp_event()
720 __func__, event, priv->hp_en_counter); in mt_hp_event()
724 priv->hp_en_counter++; in mt_hp_event()
725 if (priv->hp_en_counter > 1) in mt_hp_event()
727 else if (priv->hp_en_counter <= 0) in mt_hp_event()
728 dev_err(priv->dev, "%s(), hp_en_counter %d <= 0\n", in mt_hp_event()
730 priv->hp_en_counter); in mt_hp_event()
735 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON6, in mt_hp_event()
739 regmap_read(cmpnt->regmap, MT6351_ZCD_CON2, ®); in mt_hp_event()
740 priv->ana_gain[AUDIO_ANALOG_VOLUME_HPOUTL] = reg & 0x1f; in mt_hp_event()
741 priv->ana_gain[AUDIO_ANALOG_VOLUME_HPOUTR] = (reg >> 7) & 0x1f; in mt_hp_event()
743 /* Set HPR/HPL gain as minimum (~ -40dB) */ in mt_hp_event()
744 regmap_update_bits(cmpnt->regmap, in mt_hp_event()
746 /* Set HS gain as minimum (~ -40dB) */ in mt_hp_event()
747 regmap_update_bits(cmpnt->regmap, in mt_hp_event()
750 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON2, in mt_hp_event()
753 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON1, in mt_hp_event()
756 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON1, in mt_hp_event()
759 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON0, in mt_hp_event()
761 /* Enable pre-charge buffer */ in mt_hp_event()
762 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON1, in mt_hp_event()
771 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON1, in mt_hp_event()
773 /* Disable pre-charge buffer */ in mt_hp_event()
774 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON1, in mt_hp_event()
777 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON0, in mt_hp_event()
782 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON6, in mt_hp_event()
794 priv->hp_en_counter--; in mt_hp_event()
795 if (priv->hp_en_counter > 0) in mt_hp_event()
797 else if (priv->hp_en_counter < 0) in mt_hp_event()
798 dev_err(priv->dev, "%s(), hp_en_counter %d <= 0\n", in mt_hp_event()
800 priv->hp_en_counter); in mt_hp_event()
805 /* Set HPR/HPL gain as -1dB, step by step */ in mt_hp_event()
811 if (priv->hp_en_counter > 0) in mt_hp_event()
813 else if (priv->hp_en_counter < 0) in mt_hp_event()
814 dev_err(priv->dev, "%s(), hp_en_counter %d <= 0\n", in mt_hp_event()
816 priv->hp_en_counter); in mt_hp_event()
819 regmap_update_bits(cmpnt->regmap, in mt_hp_event()
824 regmap_update_bits(cmpnt->regmap, in mt_hp_event()
843 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_aif_out_event()
846 dev_dbg(priv->dev, "%s(), event 0x%x, rate %d\n", in mt_aif_out_event()
847 __func__, event, priv->ul_rate); in mt_aif_out_event()
852 regmap_update_bits(cmpnt->regmap, MT6351_AFE_DCCLK_CFG0, in mt_aif_out_event()
855 regmap_update_bits(cmpnt->regmap, MT6351_AFE_DCCLK_CFG0, in mt_aif_out_event()
858 regmap_update_bits(cmpnt->regmap, MT6351_AFE_DCCLK_CFG0, in mt_aif_out_event()
862 regmap_update_bits(cmpnt->regmap, MT6351_AFE_UL_SRC_CON0_H, in mt_aif_out_event()
864 get_cap_reg_val(cmpnt, priv->ul_rate) << 1); in mt_aif_out_event()
867 if (priv->ul_rate <= 48000) { in mt_aif_out_event()
869 regmap_update_bits(cmpnt->regmap, in mt_aif_out_event()
874 regmap_update_bits(cmpnt->regmap, in mt_aif_out_event()
882 if (priv->ul_rate <= 48000) { in mt_aif_out_event()
884 regmap_update_bits(cmpnt->regmap, in mt_aif_out_event()
889 regmap_update_bits(cmpnt->regmap, in mt_aif_out_event()
906 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_adc_clkgen_event()
910 /* Audio ADC clock gen. mode: 00_divided by 2 (Normal) */ in mt_adc_clkgen_event()
911 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON3, in mt_adc_clkgen_event()
915 /* ADC CLK from: 00_13MHz from CLKSQ (Default) */ in mt_adc_clkgen_event()
916 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON3, in mt_adc_clkgen_event()
929 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_pga_left_event()
934 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON0, in mt_pga_left_event()
938 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON0, in mt_pga_left_event()
945 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON0, in mt_pga_left_event()
959 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_pga_right_event()
964 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON1, in mt_pga_right_event()
968 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON1, in mt_pga_right_event()
975 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON1, in mt_pga_right_event()
989 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_mic_bias_0_event()
994 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9, in mt_mic_bias_0_event()
997 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9, in mt_mic_bias_0_event()
1003 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9, in mt_mic_bias_0_event()
1017 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_mic_bias_1_event()
1022 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON10, in mt_mic_bias_1_event()
1025 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON10, in mt_mic_bias_1_event()
1031 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON10, in mt_mic_bias_1_event()
1045 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_mic_bias_2_event()
1050 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9, in mt_mic_bias_2_event()
1053 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9, in mt_mic_bias_2_event()
1059 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9, in mt_mic_bias_2_event()
1139 SND_SOC_DAPM_MUX("DAC In Mux", SND_SOC_NOPM, 0, 0, &dac_in_mux_control),
1151 SND_SOC_DAPM_MUX("LOL Mux", SND_SOC_NOPM, 0, 0, &lo_in_mux_control),
1162 SND_SOC_DAPM_MUX("HPL Mux", SND_SOC_NOPM, 0, 0, &hpl_in_mux_control),
1163 SND_SOC_DAPM_MUX("HPR Mux", SND_SOC_NOPM, 0, 0, &hpr_in_mux_control),
1179 SND_SOC_DAPM_MUX("RCV Mux", SND_SOC_NOPM, 0, 0, &rcv_in_mux_control),
1226 SND_SOC_DAPM_SUPPLY_S("ADC CLKGEN", SUPPLY_SUBSEQ_ENABLE,
1231 /* Uplinks MUX */
1232 SND_SOC_DAPM_MUX("AIF Out Mux", SND_SOC_NOPM, 0, 0,
1235 SND_SOC_DAPM_MUX("ADC L Mux", SND_SOC_NOPM, 0, 0,
1237 SND_SOC_DAPM_MUX("ADC R Mux", SND_SOC_NOPM, 0, 0,
1240 SND_SOC_DAPM_ADC("ADC L", NULL,
1242 SND_SOC_DAPM_ADC("ADC R", NULL,
1245 SND_SOC_DAPM_MUX("PGA L Mux", SND_SOC_NOPM, 0, 0,
1247 SND_SOC_DAPM_MUX("PGA R Mux", SND_SOC_NOPM, 0, 0,
1288 {"AIF1TX", NULL, "AIF Out Mux"},
1304 {"AIF Out Mux", "Normal Path", "ADC L"},
1305 {"AIF Out Mux", "Normal Path", "ADC R"},
1307 {"ADC L", NULL, "ADC L Mux"},
1308 {"ADC L", NULL, "AUD_CK"},
1309 {"ADC L", NULL, "AUDIF_CK"},
1310 {"ADC L", NULL, "ADC CLKGEN"},
1311 {"ADC R", NULL, "ADC R Mux"},
1312 {"ADC R", NULL, "AUD_CK"},
1313 {"ADC R", NULL, "AUDIF_CK"},
1314 {"ADC R", NULL, "ADC CLKGEN"},
1316 {"ADC L Mux", "AIN0", "AIN0"},
1317 {"ADC L Mux", "Left Preamplifier", "PGA L"},
1319 {"ADC R Mux", "AIN0", "AIN0"},
1320 {"ADC R Mux", "Right Preamplifier", "PGA R"},
1322 {"PGA L", NULL, "PGA L Mux"},
1323 {"PGA R", NULL, "PGA R Mux"},
1325 {"PGA L Mux", "AIN0", "AIN0"},
1326 {"PGA L Mux", "AIN1", "AIN1"},
1327 {"PGA L Mux", "AIN2", "AIN2"},
1329 {"PGA R Mux", "AIN0", "AIN0"},
1330 {"PGA R Mux", "AIN3", "AIN3"},
1331 {"PGA R Mux", "AIN2", "AIN2"},
1364 {"DAC In Mux", "Normal Path", "AIF_RX"},
1366 {"DAC In Mux", "Sgen", "SGEN DL"},
1372 {"DACL", NULL, "DAC In Mux"},
1376 {"DACR", NULL, "DAC In Mux"},
1380 {"LOL Mux", "Playback", "DACL"},
1382 {"LOL Buffer", NULL, "LOL Mux"},
1389 {"HPL Mux", "Audio Playback", "DACL"},
1390 {"HPR Mux", "Audio Playback", "DACR"},
1392 {"HPL Mux", "LoudSPK Playback", "DACL"},
1393 {"HPR Mux", "LoudSPK Playback", "DACR"},
1395 {"HPL Power", NULL, "HPL Mux"},
1396 {"HPR Power", NULL, "HPR Mux"},
1402 {"RCV Mux", "Voice Playback", "DACL"},
1404 {"RCV Buffer", NULL, "RCV Mux"},
1414 regmap_update_bits(cmpnt->regmap, MT6351_TOP_CLKSQ, 0x0001, 0x0); in mt6351_codec_init_reg()
1416 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON9, in mt6351_codec_init_reg()
1419 regmap_update_bits(cmpnt->regmap, MT6351_TOP_CKPDN_CON0_SET, in mt6351_codec_init_reg()
1422 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON0, in mt6351_codec_init_reg()
1425 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON3, in mt6351_codec_init_reg()
1428 regmap_update_bits(cmpnt->regmap, MT6351_AFE_PMIC_NEWIF_CFG2, in mt6351_codec_init_reg()
1437 snd_soc_component_init_regmap(cmpnt, priv->regmap); in mt6351_codec_probe()
1457 priv = devm_kzalloc(&pdev->dev, in mt6351_codec_driver_probe()
1461 return -ENOMEM; in mt6351_codec_driver_probe()
1463 dev_set_drvdata(&pdev->dev, priv); in mt6351_codec_driver_probe()
1465 priv->dev = &pdev->dev; in mt6351_codec_driver_probe()
1467 priv->regmap = dev_get_regmap(pdev->dev.parent, NULL); in mt6351_codec_driver_probe()
1468 if (!priv->regmap) in mt6351_codec_driver_probe()
1469 return -ENODEV; in mt6351_codec_driver_probe()
1471 dev_dbg(priv->dev, "%s(), dev name %s\n", in mt6351_codec_driver_probe()
1472 __func__, dev_name(&pdev->dev)); in mt6351_codec_driver_probe()
1474 return devm_snd_soc_register_component(&pdev->dev, in mt6351_codec_driver_probe()
1481 {.compatible = "mediatek,mt6351-sound",},
1487 .name = "mt6351-sound",