Lines Matching full:rx1
625 "ZERO", "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
629 "ZERO", "DEC0", "DEC1", "IIR0", "IIR1", "RX0", "RX1", "RX2",
639 "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
1671 * CDC_DMA_RX_0 port drives RX0/RX1 -- ch_mask 0x1/0x2/0x3 in rx_macro_get_channel_map()
2945 SND_SOC_DAPM_MUX("RX_MACRO RX1 MUX", SND_SOC_NOPM, RX_MACRO_RX1, 0,
3085 {"RX_MACRO RX1 MUX", "AIF1_PB", "RX AIF1 PB"},
3092 {"RX_MACRO RX1 MUX", "AIF2_PB", "RX AIF2 PB"},
3099 {"RX_MACRO RX1 MUX", "AIF3_PB", "RX AIF3 PB"},
3106 {"RX_MACRO RX1 MUX", "AIF4_PB", "RX AIF4 PB"},
3113 {"RX_RX1", NULL, "RX_MACRO RX1 MUX"},
3120 {"RX INT0_1 MIX1 INP0", "RX1", "RX_RX1"},
3130 {"RX INT0_1 MIX1 INP1", "RX1", "RX_RX1"},
3140 {"RX INT0_1 MIX1 INP2", "RX1", "RX_RX1"},
3151 {"RX INT1_1 MIX1 INP0", "RX1", "RX_RX1"},
3161 {"RX INT1_1 MIX1 INP1", "RX1", "RX_RX1"},
3171 {"RX INT1_1 MIX1 INP2", "RX1", "RX_RX1"},
3182 {"RX INT2_1 MIX1 INP0", "RX1", "RX_RX1"},
3192 {"RX INT2_1 MIX1 INP1", "RX1", "RX_RX1"},
3202 {"RX INT2_1 MIX1 INP2", "RX1", "RX_RX1"},
3238 {"RX INT0_2 MUX", "RX1", "RX_RX1"},
3248 {"RX INT1_2 MUX", "RX1", "RX_RX1"},
3258 {"RX INT2_2 MUX", "RX1", "RX_RX1"},
3297 {"IIR0 INP0 MUX", "RX1", "RX_RX1"},
3308 {"IIR0 INP1 MUX", "RX1", "RX_RX1"},
3319 {"IIR0 INP2 MUX", "RX1", "RX_RX1"},
3330 {"IIR0 INP3 MUX", "RX1", "RX_RX1"},
3343 {"IIR1 INP0 MUX", "RX1", "RX_RX1"},
3354 {"IIR1 INP1 MUX", "RX1", "RX_RX1"},
3365 {"IIR1 INP2 MUX", "RX1", "RX_RX1"},
3376 {"IIR1 INP3 MUX", "RX1", "RX_RX1"},