Lines Matching refs:mdev_state
129 struct mdev_state { struct
157 static int mtty_trigger_interrupt(struct mdev_state *mdev_state); argument
175 static void mtty_create_config_space(struct mdev_state *mdev_state) in mtty_create_config_space() argument
178 STORE_LE32((u32 *) &mdev_state->vconfig[0x0], 0x32534348); in mtty_create_config_space()
181 STORE_LE16((u16 *) &mdev_state->vconfig[0x4], 0x0001); in mtty_create_config_space()
184 STORE_LE16((u16 *) &mdev_state->vconfig[0x6], 0x0200); in mtty_create_config_space()
187 mdev_state->vconfig[0x8] = 0x10; in mtty_create_config_space()
190 mdev_state->vconfig[0x9] = 0x02; in mtty_create_config_space()
193 mdev_state->vconfig[0xa] = 0x00; in mtty_create_config_space()
196 mdev_state->vconfig[0xb] = 0x07; in mtty_create_config_space()
200 STORE_LE32((u32 *) &mdev_state->vconfig[0x10], 0x000001); in mtty_create_config_space()
201 mdev_state->bar_mask[0] = ~(MTTY_IO_BAR_SIZE) + 1; in mtty_create_config_space()
203 if (mdev_state->nr_ports == 2) { in mtty_create_config_space()
205 STORE_LE32((u32 *) &mdev_state->vconfig[0x14], 0x000001); in mtty_create_config_space()
206 mdev_state->bar_mask[1] = ~(MTTY_IO_BAR_SIZE) + 1; in mtty_create_config_space()
210 STORE_LE32((u32 *) &mdev_state->vconfig[0x2c], 0x32534348); in mtty_create_config_space()
212 mdev_state->vconfig[0x34] = 0x00; /* Cap Ptr */ in mtty_create_config_space()
213 mdev_state->vconfig[0x3d] = 0x01; /* interrupt pin (INTA#) */ in mtty_create_config_space()
216 mdev_state->vconfig[0x40] = 0x23; in mtty_create_config_space()
217 mdev_state->vconfig[0x43] = 0x80; in mtty_create_config_space()
218 mdev_state->vconfig[0x44] = 0x23; in mtty_create_config_space()
219 mdev_state->vconfig[0x48] = 0x23; in mtty_create_config_space()
220 mdev_state->vconfig[0x4c] = 0x23; in mtty_create_config_space()
222 mdev_state->vconfig[0x60] = 0x50; in mtty_create_config_space()
223 mdev_state->vconfig[0x61] = 0x43; in mtty_create_config_space()
224 mdev_state->vconfig[0x62] = 0x49; in mtty_create_config_space()
225 mdev_state->vconfig[0x63] = 0x20; in mtty_create_config_space()
226 mdev_state->vconfig[0x64] = 0x53; in mtty_create_config_space()
227 mdev_state->vconfig[0x65] = 0x65; in mtty_create_config_space()
228 mdev_state->vconfig[0x66] = 0x72; in mtty_create_config_space()
229 mdev_state->vconfig[0x67] = 0x69; in mtty_create_config_space()
230 mdev_state->vconfig[0x68] = 0x61; in mtty_create_config_space()
231 mdev_state->vconfig[0x69] = 0x6c; in mtty_create_config_space()
232 mdev_state->vconfig[0x6a] = 0x2f; in mtty_create_config_space()
233 mdev_state->vconfig[0x6b] = 0x55; in mtty_create_config_space()
234 mdev_state->vconfig[0x6c] = 0x41; in mtty_create_config_space()
235 mdev_state->vconfig[0x6d] = 0x52; in mtty_create_config_space()
236 mdev_state->vconfig[0x6e] = 0x54; in mtty_create_config_space()
239 static void handle_pci_cfg_write(struct mdev_state *mdev_state, u16 offset, in handle_pci_cfg_write() argument
250 mdev_state->vconfig[0x3c] = buf[0]; in handle_pci_cfg_write()
265 if ((mdev_state->nr_ports == 1) && (bar_index == 1)) { in handle_pci_cfg_write()
266 STORE_LE32(&mdev_state->vconfig[offset], 0); in handle_pci_cfg_write()
274 bar_mask = mdev_state->bar_mask[bar_index]; in handle_pci_cfg_write()
278 cfg_addr |= (mdev_state->vconfig[offset] & 0x3ul); in handle_pci_cfg_write()
279 STORE_LE32(&mdev_state->vconfig[offset], cfg_addr); in handle_pci_cfg_write()
284 STORE_LE32(&mdev_state->vconfig[offset], 0); in handle_pci_cfg_write()
293 static void handle_bar_write(unsigned int index, struct mdev_state *mdev_state, in handle_bar_write() argument
302 if (mdev_state->s[index].dlab) { in handle_bar_write()
303 mdev_state->s[index].divisor |= data; in handle_bar_write()
307 mutex_lock(&mdev_state->rxtx_lock); in handle_bar_write()
310 if (mdev_state->s[index].rxtx.count < in handle_bar_write()
311 mdev_state->s[index].max_fifo_size) { in handle_bar_write()
312 mdev_state->s[index].rxtx.fifo[ in handle_bar_write()
313 mdev_state->s[index].rxtx.head] = data; in handle_bar_write()
314 mdev_state->s[index].rxtx.count++; in handle_bar_write()
315 CIRCULAR_BUF_INC_IDX(mdev_state->s[index].rxtx.head); in handle_bar_write()
316 mdev_state->s[index].overrun = false; in handle_bar_write()
322 if ((mdev_state->s[index].uart_reg[UART_IER] & in handle_bar_write()
324 (mdev_state->s[index].rxtx.count == in handle_bar_write()
325 mdev_state->s[index].intr_trigger_level)) { in handle_bar_write()
331 mtty_trigger_interrupt(mdev_state); in handle_bar_write()
337 mdev_state->s[index].overrun = true; in handle_bar_write()
343 if (mdev_state->s[index].uart_reg[UART_IER] & in handle_bar_write()
345 mtty_trigger_interrupt(mdev_state); in handle_bar_write()
347 mutex_unlock(&mdev_state->rxtx_lock); in handle_bar_write()
352 if (mdev_state->s[index].dlab) in handle_bar_write()
353 mdev_state->s[index].divisor |= (u16)data << 8; in handle_bar_write()
355 mdev_state->s[index].uart_reg[offset] = data; in handle_bar_write()
356 mutex_lock(&mdev_state->rxtx_lock); in handle_bar_write()
358 (mdev_state->s[index].rxtx.head == in handle_bar_write()
359 mdev_state->s[index].rxtx.tail)) { in handle_bar_write()
364 mtty_trigger_interrupt(mdev_state); in handle_bar_write()
367 mutex_unlock(&mdev_state->rxtx_lock); in handle_bar_write()
373 mdev_state->s[index].fcr = data; in handle_bar_write()
375 mutex_lock(&mdev_state->rxtx_lock); in handle_bar_write()
378 mdev_state->s[index].rxtx.count = 0; in handle_bar_write()
379 mdev_state->s[index].rxtx.head = 0; in handle_bar_write()
380 mdev_state->s[index].rxtx.tail = 0; in handle_bar_write()
382 mutex_unlock(&mdev_state->rxtx_lock); in handle_bar_write()
386 mdev_state->s[index].intr_trigger_level = 1; in handle_bar_write()
390 mdev_state->s[index].intr_trigger_level = 4; in handle_bar_write()
394 mdev_state->s[index].intr_trigger_level = 8; in handle_bar_write()
398 mdev_state->s[index].intr_trigger_level = 14; in handle_bar_write()
407 mdev_state->s[index].intr_trigger_level = 1; in handle_bar_write()
409 mdev_state->s[index].max_fifo_size = MAX_FIFO_SIZE; in handle_bar_write()
411 mdev_state->s[index].max_fifo_size = 1; in handle_bar_write()
412 mdev_state->s[index].intr_trigger_level = 1; in handle_bar_write()
419 mdev_state->s[index].dlab = true; in handle_bar_write()
420 mdev_state->s[index].divisor = 0; in handle_bar_write()
422 mdev_state->s[index].dlab = false; in handle_bar_write()
424 mdev_state->s[index].uart_reg[offset] = data; in handle_bar_write()
428 mdev_state->s[index].uart_reg[offset] = data; in handle_bar_write()
430 if ((mdev_state->s[index].uart_reg[UART_IER] & UART_IER_MSI) && in handle_bar_write()
435 mtty_trigger_interrupt(mdev_state); in handle_bar_write()
438 if ((mdev_state->s[index].uart_reg[UART_IER] & UART_IER_MSI) && in handle_bar_write()
443 mtty_trigger_interrupt(mdev_state); in handle_bar_write()
453 mdev_state->s[index].uart_reg[offset] = data; in handle_bar_write()
461 static void handle_bar_read(unsigned int index, struct mdev_state *mdev_state, in handle_bar_read() argument
468 if (mdev_state->s[index].dlab) { in handle_bar_read()
469 *buf = (u8)mdev_state->s[index].divisor; in handle_bar_read()
473 mutex_lock(&mdev_state->rxtx_lock); in handle_bar_read()
475 if (mdev_state->s[index].rxtx.head != in handle_bar_read()
476 mdev_state->s[index].rxtx.tail) { in handle_bar_read()
477 *buf = mdev_state->s[index].rxtx.fifo[ in handle_bar_read()
478 mdev_state->s[index].rxtx.tail]; in handle_bar_read()
479 mdev_state->s[index].rxtx.count--; in handle_bar_read()
480 CIRCULAR_BUF_INC_IDX(mdev_state->s[index].rxtx.tail); in handle_bar_read()
483 if (mdev_state->s[index].rxtx.head == in handle_bar_read()
484 mdev_state->s[index].rxtx.tail) { in handle_bar_read()
492 if (mdev_state->s[index].uart_reg[UART_IER] & in handle_bar_read()
494 mtty_trigger_interrupt(mdev_state); in handle_bar_read()
496 mutex_unlock(&mdev_state->rxtx_lock); in handle_bar_read()
501 if (mdev_state->s[index].dlab) { in handle_bar_read()
502 *buf = (u8)(mdev_state->s[index].divisor >> 8); in handle_bar_read()
505 *buf = mdev_state->s[index].uart_reg[offset] & 0x0f; in handle_bar_read()
510 u8 ier = mdev_state->s[index].uart_reg[UART_IER]; in handle_bar_read()
513 mutex_lock(&mdev_state->rxtx_lock); in handle_bar_read()
515 if ((ier & UART_IER_RLSI) && mdev_state->s[index].overrun) in handle_bar_read()
520 (mdev_state->s[index].rxtx.count >= in handle_bar_read()
521 mdev_state->s[index].intr_trigger_level)) in handle_bar_read()
526 (mdev_state->s[index].rxtx.head == in handle_bar_read()
527 mdev_state->s[index].rxtx.tail)) in handle_bar_read()
532 (mdev_state->s[index].uart_reg[UART_MCR] & in handle_bar_read()
542 mutex_unlock(&mdev_state->rxtx_lock); in handle_bar_read()
548 *buf = mdev_state->s[index].uart_reg[offset]; in handle_bar_read()
555 mutex_lock(&mdev_state->rxtx_lock); in handle_bar_read()
557 if (mdev_state->s[index].rxtx.head != in handle_bar_read()
558 mdev_state->s[index].rxtx.tail) in handle_bar_read()
562 if (mdev_state->s[index].overrun) in handle_bar_read()
566 if (mdev_state->s[index].rxtx.head == in handle_bar_read()
567 mdev_state->s[index].rxtx.tail) in handle_bar_read()
570 mutex_unlock(&mdev_state->rxtx_lock); in handle_bar_read()
577 mutex_lock(&mdev_state->rxtx_lock); in handle_bar_read()
579 if (mdev_state->s[index].uart_reg[UART_MCR] & in handle_bar_read()
581 if (mdev_state->s[index].rxtx.count < in handle_bar_read()
582 mdev_state->s[index].max_fifo_size) in handle_bar_read()
586 mutex_unlock(&mdev_state->rxtx_lock); in handle_bar_read()
591 *buf = mdev_state->s[index].uart_reg[offset]; in handle_bar_read()
599 static void mdev_read_base(struct mdev_state *mdev_state) in mdev_read_base() argument
609 if (!mdev_state->region_info[index].size) in mdev_read_base()
612 start_lo = (*(u32 *)(mdev_state->vconfig + pos)) & in mdev_read_base()
614 mem_type = (*(u32 *)(mdev_state->vconfig + pos)) & in mdev_read_base()
619 start_hi = (*(u32 *)(mdev_state->vconfig + pos + 4)); in mdev_read_base()
631 mdev_state->region_info[index].start = ((u64)start_hi << 32) | in mdev_read_base()
636 static ssize_t mdev_access(struct mdev_state *mdev_state, u8 *buf, size_t count, in mdev_access() argument
646 mutex_lock(&mdev_state->ops_lock); in mdev_access()
659 handle_pci_cfg_write(mdev_state, offset, buf, count); in mdev_access()
661 memcpy(buf, (mdev_state->vconfig + offset), count); in mdev_access()
668 if (!mdev_state->region_info[index].start) in mdev_access()
669 mdev_read_base(mdev_state); in mdev_access()
677 *buf, mdev_state->s[index].dlab); in mdev_access()
679 handle_bar_write(index, mdev_state, offset, buf, count); in mdev_access()
681 handle_bar_read(index, mdev_state, offset, buf, count); in mdev_access()
687 *buf, mdev_state->s[index].dlab); in mdev_access()
701 mutex_unlock(&mdev_state->ops_lock); in mdev_access()
708 struct mdev_state *mdev_state; in mtty_probe() local
719 mdev_state = kzalloc(sizeof(struct mdev_state), GFP_KERNEL); in mtty_probe()
720 if (mdev_state == NULL) { in mtty_probe()
725 vfio_init_group_dev(&mdev_state->vdev, &mdev->dev, &mtty_dev_ops); in mtty_probe()
727 mdev_state->nr_ports = nr_ports; in mtty_probe()
728 mdev_state->irq_index = -1; in mtty_probe()
729 mdev_state->s[0].max_fifo_size = MAX_FIFO_SIZE; in mtty_probe()
730 mdev_state->s[1].max_fifo_size = MAX_FIFO_SIZE; in mtty_probe()
731 mutex_init(&mdev_state->rxtx_lock); in mtty_probe()
732 mdev_state->vconfig = kzalloc(MTTY_CONFIG_SPACE_SIZE, GFP_KERNEL); in mtty_probe()
734 if (mdev_state->vconfig == NULL) { in mtty_probe()
739 mutex_init(&mdev_state->ops_lock); in mtty_probe()
740 mdev_state->mdev = mdev; in mtty_probe()
742 mtty_create_config_space(mdev_state); in mtty_probe()
744 ret = vfio_register_group_dev(&mdev_state->vdev); in mtty_probe()
747 dev_set_drvdata(&mdev->dev, mdev_state); in mtty_probe()
751 kfree(mdev_state->vconfig); in mtty_probe()
753 vfio_uninit_group_dev(&mdev_state->vdev); in mtty_probe()
754 kfree(mdev_state); in mtty_probe()
762 struct mdev_state *mdev_state = dev_get_drvdata(&mdev->dev); in mtty_remove() local
763 int nr_ports = mdev_state->nr_ports; in mtty_remove()
765 vfio_unregister_group_dev(&mdev_state->vdev); in mtty_remove()
767 kfree(mdev_state->vconfig); in mtty_remove()
768 vfio_uninit_group_dev(&mdev_state->vdev); in mtty_remove()
769 kfree(mdev_state); in mtty_remove()
773 static int mtty_reset(struct mdev_state *mdev_state) in mtty_reset() argument
783 struct mdev_state *mdev_state = in mtty_read() local
784 container_of(vdev, struct mdev_state, vdev); in mtty_read()
794 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val), in mtty_read()
806 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val), in mtty_read()
818 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val), in mtty_read()
844 struct mdev_state *mdev_state = in mtty_write() local
845 container_of(vdev, struct mdev_state, vdev); in mtty_write()
858 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val), in mtty_write()
870 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val), in mtty_write()
882 ret = mdev_access(mdev_state, (u8 *)&val, sizeof(val), in mtty_write()
900 static int mtty_set_irqs(struct mdev_state *mdev_state, uint32_t flags, in mtty_set_irqs() argument
906 mutex_lock(&mdev_state->ops_lock); in mtty_set_irqs()
917 if (mdev_state->intx_evtfd) in mtty_set_irqs()
918 eventfd_ctx_put(mdev_state->intx_evtfd); in mtty_set_irqs()
933 mdev_state->intx_evtfd = evt; in mtty_set_irqs()
934 mdev_state->irq_fd = fd; in mtty_set_irqs()
935 mdev_state->irq_index = index; in mtty_set_irqs()
950 if (mdev_state->msi_evtfd) in mtty_set_irqs()
951 eventfd_ctx_put(mdev_state->msi_evtfd); in mtty_set_irqs()
953 mdev_state->irq_index = VFIO_PCI_INTX_IRQ_INDEX; in mtty_set_irqs()
963 if (mdev_state->msi_evtfd) in mtty_set_irqs()
971 mdev_state->msi_evtfd = evt; in mtty_set_irqs()
972 mdev_state->irq_fd = fd; in mtty_set_irqs()
973 mdev_state->irq_index = index; in mtty_set_irqs()
989 mutex_unlock(&mdev_state->ops_lock); in mtty_set_irqs()
993 static int mtty_trigger_interrupt(struct mdev_state *mdev_state) in mtty_trigger_interrupt() argument
997 if ((mdev_state->irq_index == VFIO_PCI_MSI_IRQ_INDEX) && in mtty_trigger_interrupt()
998 (!mdev_state->msi_evtfd)) in mtty_trigger_interrupt()
1000 else if ((mdev_state->irq_index == VFIO_PCI_INTX_IRQ_INDEX) && in mtty_trigger_interrupt()
1001 (!mdev_state->intx_evtfd)) { in mtty_trigger_interrupt()
1006 if (mdev_state->irq_index == VFIO_PCI_MSI_IRQ_INDEX) in mtty_trigger_interrupt()
1007 ret = eventfd_signal(mdev_state->msi_evtfd, 1); in mtty_trigger_interrupt()
1009 ret = eventfd_signal(mdev_state->intx_evtfd, 1); in mtty_trigger_interrupt()
1020 static int mtty_get_region_info(struct mdev_state *mdev_state, in mtty_get_region_info() argument
1031 mutex_lock(&mdev_state->ops_lock); in mtty_get_region_info()
1041 if (mdev_state->nr_ports == 2) in mtty_get_region_info()
1049 mdev_state->region_info[bar_index].size = size; in mtty_get_region_info()
1050 mdev_state->region_info[bar_index].vfio_offset = in mtty_get_region_info()
1057 mutex_unlock(&mdev_state->ops_lock); in mtty_get_region_info()
1097 struct mdev_state *mdev_state = in mtty_ioctl() local
1098 container_of(vdev, struct mdev_state, vdev); in mtty_ioctl()
1119 memcpy(&mdev_state->dev_info, &info, sizeof(info)); in mtty_ioctl()
1140 ret = mtty_get_region_info(mdev_state, &info, &cap_type_id, in mtty_ioctl()
1161 (info.index >= mdev_state->dev_info.num_irqs)) in mtty_ioctl()
1185 mdev_state->dev_info.num_irqs, in mtty_ioctl()
1198 ret = mtty_set_irqs(mdev_state, hdr.flags, hdr.index, hdr.start, in mtty_ioctl()
1205 return mtty_reset(mdev_state); in mtty_ioctl()