53 #define DST	regs[insn->dst_reg]  macro
1416 		DST = DST OP (SRC & 63);		\  in ___bpf_prog_run()
1419 		DST = (u32) DST OP ((u32) SRC & 31);	\  in ___bpf_prog_run()
1422 		DST = DST OP IMM;			\  in ___bpf_prog_run()
1425 		DST = (u32) DST OP (u32) IMM;		\  in ___bpf_prog_run()
1430 		DST = DST OP SRC;			\  in ___bpf_prog_run()
1433 		DST = (u32) DST OP (u32) SRC;		\  in ___bpf_prog_run()
1436 		DST = DST OP IMM;			\  in ___bpf_prog_run()
1439 		DST = (u32) DST OP (u32) IMM;		\  in ___bpf_prog_run()
1452 		DST = (u32) -DST;  in ___bpf_prog_run()
1455 		DST = -DST;  in ___bpf_prog_run()
1458 		DST = (u32) SRC;  in ___bpf_prog_run()
1461 		DST = (u32) IMM;  in ___bpf_prog_run()
1464 		DST = SRC;  in ___bpf_prog_run()
1467 		DST = IMM;  in ___bpf_prog_run()
1470 		DST = (u64) (u32) insn[0].imm | ((u64) (u32) insn[1].imm) << 32;  in ___bpf_prog_run()
1474 		DST = (u64) (u32) (((s32) DST) >> (SRC & 31));  in ___bpf_prog_run()
1477 		DST = (u64) (u32) (((s32) DST) >> IMM);  in ___bpf_prog_run()
1480 		(*(s64 *) &DST) >>= (SRC & 63);  in ___bpf_prog_run()
1483 		(*(s64 *) &DST) >>= IMM;  in ___bpf_prog_run()
1486 		div64_u64_rem(DST, SRC, &AX);  in ___bpf_prog_run()
1487 		DST = AX;  in ___bpf_prog_run()
1490 		AX = (u32) DST;  in ___bpf_prog_run()
1491 		DST = do_div(AX, (u32) SRC);  in ___bpf_prog_run()
1494 		div64_u64_rem(DST, IMM, &AX);  in ___bpf_prog_run()
1495 		DST = AX;  in ___bpf_prog_run()
1498 		AX = (u32) DST;  in ___bpf_prog_run()
1499 		DST = do_div(AX, (u32) IMM);  in ___bpf_prog_run()
1502 		DST = div64_u64(DST, SRC);  in ___bpf_prog_run()
1505 		AX = (u32) DST;  in ___bpf_prog_run()
1507 		DST = (u32) AX;  in ___bpf_prog_run()
1510 		DST = div64_u64(DST, IMM);  in ___bpf_prog_run()
1513 		AX = (u32) DST;  in ___bpf_prog_run()
1515 		DST = (u32) AX;  in ___bpf_prog_run()
1520 			DST = (__force u16) cpu_to_be16(DST);  in ___bpf_prog_run()
1523 			DST = (__force u32) cpu_to_be32(DST);  in ___bpf_prog_run()
1526 			DST = (__force u64) cpu_to_be64(DST);  in ___bpf_prog_run()
1533 			DST = (__force u16) cpu_to_le16(DST);  in ___bpf_prog_run()
1536 			DST = (__force u32) cpu_to_le32(DST);  in ___bpf_prog_run()
1539 			DST = (__force u64) cpu_to_le64(DST);  in ___bpf_prog_run()
1596 		if ((SIGN##64) DST CMP_OP (SIGN##64) SRC) {	\  in ___bpf_prog_run()
1602 		if ((SIGN##32) DST CMP_OP (SIGN##32) SRC) {	\  in ___bpf_prog_run()
1608 		if ((SIGN##64) DST CMP_OP (SIGN##64) IMM) {	\  in ___bpf_prog_run()
1614 		if ((SIGN##32) DST CMP_OP (SIGN##32) IMM) {	\  in ___bpf_prog_run()
1648 		*(SIZE *)(unsigned long) (DST + insn->off) = SRC;	\  in ___bpf_prog_run()
1651 		*(SIZE *)(unsigned long) (DST + insn->off) = IMM;	\  in ___bpf_prog_run()
1654 		DST = *(SIZE *)(unsigned long) (SRC + insn->off);	\  in ___bpf_prog_run()
1664 		bpf_probe_read_kernel(&DST, SIZE, (const void *)(long) (SRC + insn->off));	\  in ___bpf_prog_run()
1676 					     (DST + insn->off));	\  in ___bpf_prog_run()
1679 					       (DST + insn->off));	\  in ___bpf_prog_run()
1685 					(atomic_t *)(unsigned long) (DST + insn->off)); \  in ___bpf_prog_run()
1689 					(atomic64_t *)(unsigned long) (DST + insn->off)); \  in ___bpf_prog_run()
1704 					(atomic_t *)(unsigned long) (DST + insn->off),  in ___bpf_prog_run()
1708 					(atomic64_t *)(unsigned long) (DST + insn->off),  in ___bpf_prog_run()
1714 					(atomic_t *)(unsigned long) (DST + insn->off),  in ___bpf_prog_run()
1718 					(atomic64_t *)(unsigned long) (DST + insn->off),  in ___bpf_prog_run()