Lines Matching +full:5 +full:g
23 #define MDIO_MMD_DTEXS 5 /* DTE Extender Sublayer */
36 #define MDIO_DEVS1 5 /* Devices in package */
38 #define MDIO_CTRL2 7 /* 10G control 2 */
39 #define MDIO_STAT2 8 /* 10G status 2 */
40 #define MDIO_PMA_TXDIS 9 /* 10G PMA/PMD transmit disable */
41 #define MDIO_PMA_RXDET 10 /* 10G PMA/PMD receive signal detect */
42 #define MDIO_PMA_EXTABLE 11 /* 10G PMA/PMD extended ability */
49 #define MDIO_PMA_NG_EXTABLE 21 /* 2.5G/5G PMA/PMD extended ability */
101 /* 5 Gb/s */
116 #define MDIO_SPEED_10G 0x0001 /* 10G capable */
123 #define MDIO_PCS_SPEED_2_5G 0x0040 /* 2.5G capable */
124 #define MDIO_PCS_SPEED_5G 0x0080 /* 5G capable */
159 #define MDIO_PMA_CTRL2_5GBT 0x0031 /* 5GBaseT type */
213 #define MDIO_PMA_EXTABLE_NBT 0x4000 /* 2.5/5GBASE-T ability */
251 #define MDIO_AN_10GBT_CTRL_ADV5G 0x0100 /* Advertise 5GBASE-T */
256 #define MDIO_AN_10GBT_STAT_LP5G 0x0040 /* LP is 5GBT capable */
282 #define MDIO_EEE_10GKX4 0x0020 /* 10G KX4 EEE cap */
283 #define MDIO_EEE_10GKR 0x0040 /* 10G KR EEE cap */
284 #define MDIO_EEE_40GR_FW 0x0100 /* 40G R fast wake */
285 #define MDIO_EEE_40GR_DS 0x0200 /* 40G R deep sleep */
286 #define MDIO_EEE_100GR_FW 0x1000 /* 100G R fast wake */
287 #define MDIO_EEE_100GR_DS 0x2000 /* 100G R deep sleep */
290 #define MDIO_EEE_5GT 0x0002 /* 5GT EEE cap */
292 /* 2.5G/5G Extended abilities register. */
294 #define MDIO_PMA_NG_EXTABLE_5GBT 0x0002 /* 5GBASET ability */
326 return MDIO_PHY_ID_C45 | (prtad << 5) | devad; in mdio_phy_id_c45()