158  * Different engines serve different roles, and there may be more than one
161  * operations to be performed on a certain subset of engines, or for providing
633  * value reports the support of context isolation for individual engines by
1139  * clients or engines (i.e. suballocating objects), the implicit tracking
1411 	 * conditions which prevent the report of which engines are busy from
1413 	 * object is idle, the result of the ioctl, that all engines are idle,
1426 	 * The high word (bits 16:31) are a bitmask of which engines classes
1427 	 * are currently reading from the object. Multiple engines may be
1433 	 * Some hardware may have parallel execution engines, e.g. multiple
1434 	 * media engines, which are mapped to the same class identifier and so
1439 	 * the object is idle or busy. The report of which engines are busy
1508 	 * Special GPU caching mode which is coherent with the scanout engines.
1809  * Bind this context to operate on this subset of available engines. Henceforth,
1811  * an index into this array of engines; I915_EXEC_DEFAULT selecting engine[0]
1819  * Setting the number of engines bound to the context to 0, by passing a zero
1865  * Not all GPUs or engines support this functionality in which case an error
1917  * physical engines, submit a batch buffer, and let the driver execute it on any
1921  * class engine, like for example GT3+ Skylake parts with their two VCS engines.
1923  * For instance userspace can enumerate all engines of a certain class using the
1939  * 		.engines = { { I915_ENGINE_CLASS_VIDEO, 0 },
1942  * 	I915_DEFINE_CONTEXT_PARAM_ENGINES(engines, 1) = {
1943  * 		.engines = { { I915_ENGINE_CLASS_INVALID,
1953  * 			.value = to_user_pointer(&engines),
1954  * 			.size = sizeof(engines),
1979  * Enable load balancing across this set of engines.
1982  * used will proxy the execbuffer request onto one of the set of engines
1985  * The set of engines must be compatible (e.g. the same HW class) as they
1989  * the backing engines (bypassing the load balancing proxy), the context must
1990  * be defined to use a single timeline for all engines.
2001 	struct i915_engine_class_instance engines[0];  member
2010 	struct i915_engine_class_instance engines[N__]; \
2018  * All engines are equal, but some are more equal than others. Given
2020  * a request on a given subset of engines in parallel to a request on a
2021  * specific engine. We enable this selection of engines within a virtual
2033 	__u16 virtual_index; /* index of virtual engine in ctx->engines[] */
2039 	struct i915_engine_class_instance engines[0];  member
2049 	struct i915_engine_class_instance engines[N__]; \
2055  * Context engine map is a new way of addressing engines when submitting batch-
2059  * To use it created GEM contexts need to be configured with a list of engines
2071  * 	I915_DEFINE_CONTEXT_PARAM_ENGINES(engines, 2) = {
2072  * 		.engines = { { I915_ENGINE_CLASS_RENDER, 0 },
2081  * 			.value = to_user_pointer(&engines),
2082  * 			.size = sizeof(engines),
2092  * 	// We have now created a GEM context with two engines in the map:
2093  * 	// Index 0 points to rcs0 while index 1 points to bcs0. Other engines
2111 	struct i915_engine_class_instance engines[0];  member
2116 	struct i915_engine_class_instance engines[N__]; \
2648  * Engine discovery uAPI is a way of enumerating physical engines present in a
2654  * started to establish a pattern of having multiple engines of a same class,
2660  * Example for getting the list of engines:
2675  * 	// enough to hold our array of engines. The kernel will fill out the
2687  * 	// blob, which the kernel can then populate with info on all engines.
2695  * 		struct drm_i915_engine_info einfo = info->engines[i];
2703  * Each of the enumerated engines, apart from being defined by its class and
2707  * For instance video engines which support HEVC encoding will have the
2711  * of addressing engines when submitting batch buffers using contexts with
2742  * Engine info query enumerates all engines known to the driver by filling in
2752 	/** @engines: Marker for drm_i915_engine_info structures. */
2753 	struct drm_i915_engine_info engines[];  member