Lines Matching +full:implementation +full:- +full:defined

1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
13 /* SDW spec defines and enums, as defined by MIPI 1.1. Spec */
71  * enum sdw_slave_status - Slave status
89  * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
90  * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
100  * enum sdw_command_response - Command response as defined by SDW spec
110  * SDW_CMD_TIMEOUT/FAIL_OTHER is defined for SW use, not in spec
140  * spec doesn't define this, but is used in implementation
179  * SDW properties, defined in MIPI DisCo spec v1.0
186  * enum sdw_p15_behave - Slave Port 15 behaviour when the Master attempts a
197  * enum sdw_dpn_type - Data port types
199  * @SDW_DPN_SIMPLE: Simplified Data Port as defined in spec.
202  * @SDW_DPN_REDUCED: Reduced Data Port as defined in spec.
212  * enum sdw_clk_stop_mode - Clock Stop modes
215  * @SDW_CLK_STOP_MODE1: Slave may have entered a deeper power-saving mode,
224  * struct sdw_dp0_prop - DP0 properties
231  * @BRA_flow_controlled: Slave implementation results in an OK_NotReady
235  * implementation-defined interrupts
238  * discrete values, implementation can define based on the wordlengths they
252  * struct sdw_dpn_audio_mode - Audio mode properties for DPn
284  * struct sdw_dpn_prop - Data Port DPn properties
297  * @ch_prep_timeout: Port-specific timeout value, in milliseconds
299  * implementation-defined interrupts
340  * struct sdw_slave_prop - SoundWire Slave properties
341  * @mipi_revision: Spec version of the implementation
342  * @wake_capable: Wake-up events are supported
344  * @clk_stop_mode1: Clock-Stop Mode 1 is supported
346  * @clk_stop_timeout: Worst-case latency of the Clock Stop Prepare State
348  * @ch_prep_timeout: Worst-case latency of the Channel Prepare State Machine
351  * state machine (P=1 SCSP_SM) after exit from clock-stop mode1
398  * struct sdw_master_prop - Master properties
399  * @revision: MIPI spec version of the implementation
400  * @clk_stop_modes: Bitmap, bit N set when clock-stop-modeN supported
413  * @hw_disabled: if true, the Master is not functional, typically due to pin-mux
464  * struct sdw_slave_id - Slave ID
467  * @class_id: MIPI Class ID (defined starting with SoundWire 1.2 spec)
482  * Helper macros to extract the MIPI-defined IDs
511  * struct sdw_slave_intr_status - Slave interrupt status
523  * sdw_reg_bank - SoundWire register banks
548  * struct sdw_prepare_ch: Prepare/De-prepare Data Port channel
552  * @prepare: Prepare (true) /de-prepare (false) channel
554  * implementation defined registers. This is always updated to next_bank
615  * @clk_stop: handle imp-def sequences before and after prepare and de-prepare
635  * struct sdw_slave - SoundWire Slave
647  * @dev_num_sticky: one-time static Device Number assigned by Bus
651  * Slave state changes/implementation-defined interrupts
657  * @unattach_request: mask field to keep track why the Slave re-attached and
658  * was re-initialized. This is useful to deal with potential race conditions
694  * struct sdw_master_device - SoundWire 'Master Device' representation
825  * struct sdw_defer - SDW deffered message
837  * struct sdw_master_ops - Master driver ops
866  * struct sdw_bus - SoundWire bus
867  * @dev: Shortcut to &bus->md->dev to avoid changing the entire code.
870  * @id: bus system-wide unique id
876  * @compute_params: points to Bus resource management implementation
892  * hardware-based synchronization is required. This value is only
893  * meaningful if multi_link is set. If set to 1, hardware-based
962  * @SDW_STREAM_DEPREPARED: Stream de-prepared