Lines Matching +full:bank +full:- +full:number
1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
15 /* SDW Broadcast Device Number */
18 /* SDW Enumeration Device Number */
25 /* SDW Master Device Number, not supported yet */
71 * enum sdw_slave_status - Slave status
89 * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
90 * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
100 * enum sdw_command_response - Command response as defined by SDW spec
186 * enum sdw_p15_behave - Slave Port 15 behaviour when the Master attempts a
197 * enum sdw_dpn_type - Data port types
212 * enum sdw_clk_stop_mode - Clock Stop modes
215 * @SDW_CLK_STOP_MODE1: Slave may have entered a deeper power-saving mode,
224 * struct sdw_dp0_prop - DP0 properties
225 * @max_word: Maximum number of bits in a Payload Channel Sample, 1 to 64
227 * @min_word: Minimum number of bits in a Payload Channel Sample, 1 to 64
229 * @num_words: number of wordlengths supported
235 * implementation-defined interrupts
237 * The wordlengths are specified by Spec as max, min AND number of
252 * struct sdw_dpn_audio_mode - Audio mode properties for DPn
255 * @bus_num_freq: Number of discrete frequencies supported
259 * @num_freq: Number of discrete sampling frequency supported
284 * struct sdw_dpn_prop - Data Port DPn properties
285 * @num: port number
286 * @max_word: Maximum number of bits in a Payload Channel Sample, 1 to 64
288 * @min_word: Minimum number of bits in a Payload Channel Sample, 1 to 64
290 * @num_words: Number of discrete supported wordlengths
293 * @max_grouping: Maximum number of samples that can be grouped together for
297 * @ch_prep_timeout: Port-specific timeout value, in milliseconds
299 * implementation-defined interrupts
302 * @num_channels: Number of discrete channels supported
304 * @num_ch_combinations: Number of channel combinations supported
307 * @max_async_buffer: Number of samples that this port can buffer in
340 * struct sdw_slave_prop - SoundWire Slave properties
342 * @wake_capable: Wake-up events are supported
344 * @clk_stop_mode1: Clock-Stop Mode 1 is supported
346 * @clk_stop_timeout: Worst-case latency of the Clock Stop Prepare State
348 * @ch_prep_timeout: Worst-case latency of the Channel Prepare State Machine
351 * state machine (P=1 SCSP_SM) after exit from clock-stop mode1
355 * @bank_delay_support: Slave implements bank delay/bridge support registers
360 * @master_count: Number of Masters present on this Slave
398 * struct sdw_master_prop - Master properties
400 * @clk_stop_modes: Bitmap, bit N set when clock-stop-modeN supported
402 * @num_clk_gears: Number of clock gears supported
404 * @num_clk_freq: Number of clock frequencies supported, in Hz
407 * @default_row: Number of rows
408 * @default_col: Number of columns
410 * @err_threshold: Number of times that software may retry sending a single
413 * @hw_disabled: if true, the Master is not functional, typically due to pin-mux
437 * In a number of platforms bus clashes are reported after a hardware
464 * struct sdw_slave_id - Slave ID
482 * Helper macros to extract the MIPI-defined IDs
511 * struct sdw_slave_intr_status - Slave interrupt status
523 * sdw_reg_bank - SoundWire register banks
524 * @SDW_BANK0: Soundwire register bank 0
525 * @SDW_BANK1: Soundwire register bank 1
536 * @num_rows: Number of rows in frame
537 * @num_cols: Number of columns in frame
538 * @bank: Next register bank
544 unsigned int bank; member
548 * struct sdw_prepare_ch: Prepare/De-prepare Data Port channel
550 * @num: Port number
552 * @prepare: Prepare (true) /de-prepare (false) channel
553 * @bank: Register bank, which bank Slave/Master driver should program for
562 unsigned int bank; member
581 * @curr_bank: Current bank in use (BANK0/BANK1)
582 * @next_bank: Next bank to use (BANK0/BANK1). next_bank will always be
615 * @clk_stop: handle imp-def sequences before and after prepare and de-prepare
635 * struct sdw_slave - SoundWire Slave
646 * @dev_num: Current Device Number, values can be 0 or dev_num_sticky
647 * @dev_num_sticky: one-time static Device Number assigned by Bus
651 * Slave state changes/implementation-defined interrupts
657 * @unattach_request: mask field to keep track why the Slave re-attached and
658 * was re-initialized. This is useful to deal with potential race conditions
694 * struct sdw_master_device - SoundWire 'Master Device' representation
738 * @num: Port number
757 * @num: Port number
770 * during a bank switch without any artifacts in audio stream.
788 * @num: Port number
812 unsigned int bank);
815 enum sdw_reg_bank bank);
819 struct sdw_enable_ch *enable_ch, unsigned int bank);
825 * struct sdw_defer - SDW deffered message
837 * struct sdw_master_ops - Master driver ops
844 * @pre_bank_switch: Callback for pre bank switch
845 * @post_bank_switch: Callback for post bank switch
866 * struct sdw_bus - SoundWire bus
867 * @dev: Shortcut to &bus->md->dev to avoid changing the entire code.
869 * @link_id: Link id number, can be 0 to N, unique for each Master
870 * @id: bus system-wide unique id
873 * Bit set implies used number, bit clear implies unused number.
887 * @bank_switch_timeout: Bank switch timeout computed
891 * @hw_sync_min_links: Number of links used by a stream above which
892 * hardware-based synchronization is required. This value is only
893 * meaningful if multi_link is set. If set to 1, hardware-based
929 * @num: Port number
942 * @bps: Number of bits per audio sample
962 * @SDW_STREAM_DEPREPARED: Stream de-prepared
979 * @ch_count: Number of channels