Lines Matching +full:spi +full:- +full:lsb +full:- +full:first

1 /* SPDX-License-Identifier: GPL-2.0-only */
49 * struct reg_default - Default value for a register.
63 * struct reg_sequence - An individual write from a sequence of writes.
86 * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs
93 * tight-loops). Should be less than ~20ms since usleep_range
94 * is used (see Documentation/timers/timers-howto.rst).
97 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
113 * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs
119 * @delay_us: Time to udelay between reads in us (0 tight-loops).
121 * (see Documentation/timers/timers-howto.rst).
124 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
131 * this macro then first setup your regmap for atomic use (flat or no cache
154 __ret ?: ((cond) ? 0 : -ETIMEDOUT); \
158 * regmap_field_read_poll_timeout - Poll until a condition is met or timeout
164 * tight-loops). Should be less than ~20ms since usleep_range
165 * is used (see Documentation/timers/timers-howto.rst).
168 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_field_read
186 /* Unspecified -> 0 -> Backwards compatible default */
194 * struct regmap_range - A register range, used for access related checks
197 * @range_min: address of first register
208 * struct regmap_access_table - A table of register ranges for access checks
218 * check function will return true. "no_ranges" are searched first.
231 * struct regmap_config - Configuration for the register map of a device.
290 * read operation on a bus such as SPI, I2C, etc. Most of the
298 * Use it only for "no-bus" cases.
415 * struct regmap_range_cfg - Configuration for indirectly accessed or paged
427 * @window_start: Address of first (lowest) register in data window.
475 * struct regmap_bus - Description of a hardware bus for the register map
483 * @gather_write: Write operation with split register/value, return -ENOTSUPP
486 * must serialise with respect to non-async I/O.
591 struct regmap *__regmap_init_spi_avmm(struct spi_device *spi,
656 struct regmap *__devm_regmap_init_spi_avmm(struct spi_device *spi,
662 * for each call. No-op if CONFIG_LOCKDEP is not set.
675 "(" name ")->lock"); \
683 * regmap_init() - Initialise register map
686 * @bus: Bus-specific callbacks to use with device
687 * @bus_context: Data passed to bus-specific callbacks
692 * directly, it should be called by bus-specific init functions.
701 * regmap_init_i2c() - Initialise register map
714 * regmap_init_mdio() - Initialise register map
727 * regmap_init_sccb() - Initialise register map
740 * regmap_init_slimbus() - Initialise register map
753 * regmap_init_spi() - Initialise register map
766 * regmap_init_spmi_base() - Create regmap for the Base register space
779 * regmap_init_spmi_ext() - Create regmap for Ext register space
792 * regmap_init_w1() - Initialise register map
805 * regmap_init_mmio_clk() - Initialise register map with register clock
809 * @regs: Pointer to memory-mapped IO region
820 * regmap_init_mmio() - Initialise register map
823 * @regs: Pointer to memory-mapped IO region
833 * regmap_init_ac97() - Initialise AC'97 register map
847 * regmap_init_sdw() - Initialise register map
860 * regmap_init_sdw_mbq() - Initialise register map
873 * regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
876 * @spi: Device that will be interacted with
882 #define regmap_init_spi_avmm(spi, config) \ argument
884 spi, config)
887 * devm_regmap_init() - Initialise managed register map
890 * @bus: Bus-specific callbacks to use with device
891 * @bus_context: Data passed to bus-specific callbacks
896 * directly, it should be called by bus-specific init functions. The
904 * devm_regmap_init_i2c() - Initialise managed register map
918 * devm_regmap_init_mdio() - Initialise managed register map
932 * devm_regmap_init_sccb() - Initialise managed register map
946 * devm_regmap_init_spi() - Initialise register map
960 * devm_regmap_init_spmi_base() - Create managed regmap for Base register space
974 * devm_regmap_init_spmi_ext() - Create managed regmap for Ext register space
988 * devm_regmap_init_w1() - Initialise managed register map
1001 * devm_regmap_init_mmio_clk() - Initialise managed register map with clock
1005 * @regs: Pointer to memory-mapped IO region
1017 * devm_regmap_init_mmio() - Initialise managed register map
1020 * @regs: Pointer to memory-mapped IO region
1031 * devm_regmap_init_ac97() - Initialise AC'97 register map
1045 * devm_regmap_init_sdw() - Initialise managed register map
1059 * devm_regmap_init_sdw_mbq() - Initialise managed register map
1073 * devm_regmap_init_slimbus() - Initialise managed register map
1087 * devm_regmap_init_i3c() - Initialise managed register map
1101 * devm_regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave
1104 * @spi: Device that will be interacted with
1111 #define devm_regmap_init_spi_avmm(spi, config) \ argument
1113 spi, config)
1211 return reg >= range->range_min && reg <= range->range_max; in regmap_reg_in_range()
1234 * struct reg_field - Description of an register field
1237 * @lsb: lsb of the register field.
1244 unsigned int lsb; member
1252 .lsb = _lsb, \
1258 .lsb = _lsb, \
1353 * struct regmap_irq_type - IRQ type definitions.
1373 * struct regmap_irq - Description of an IRQ for the generic regmap irq_chip.
1403 * struct regmap_irq_chip - Description of a generic regmap irq_chip.
1408 * interrupts arranged in separate sub-irq blocks with own IRQ
1410 * sub-irq blocks with unhandled interrupts. For such chips fill
1411 * sub-irq register information in status_base, mask_base and
1416 * registers. First item in array describes the registers
1417 * for first main status bit. Second array for second bit etc.
1421 * 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ...
1422 * When used with not_fixed_stride, each one-element array
1424 * peripheral to first peripheral.
1443 * @clear_ack: Use this to set 1 and 0 or vice-versa to clear interrupts.
1463 * @num_virt_regs: Number of non-standard irq configuration registers.
1568 return -EINVAL; in regmap_write()
1575 return -EINVAL; in regmap_write_async()
1582 return -EINVAL; in regmap_raw_write()
1589 return -EINVAL; in regmap_raw_write_async()
1596 return -EINVAL; in regmap_noinc_write()
1603 return -EINVAL; in regmap_bulk_write()
1610 return -EINVAL; in regmap_read()
1617 return -EINVAL; in regmap_raw_read()
1624 return -EINVAL; in regmap_noinc_read()
1631 return -EINVAL; in regmap_bulk_read()
1639 return -EINVAL; in regmap_update_bits_base()
1646 return -EINVAL; in regmap_set_bits()
1653 return -EINVAL; in regmap_clear_bits()
1660 return -EINVAL; in regmap_test_bits()
1668 return -EINVAL; in regmap_field_update_bits_base()
1677 return -EINVAL; in regmap_fields_update_bits_base()
1684 return -EINVAL; in regmap_update_bits()
1691 return -EINVAL; in regmap_update_bits_async()
1699 return -EINVAL; in regmap_update_bits_check()
1708 return -EINVAL; in regmap_update_bits_check_async()
1715 return -EINVAL; in regmap_write_bits()
1722 return -EINVAL; in regmap_field_write()
1729 return -EINVAL; in regmap_field_force_write()
1736 return -EINVAL; in regmap_field_update_bits()
1744 return -EINVAL; in regmap_field_force_update_bits()
1751 return -EINVAL; in regmap_fields_write()
1758 return -EINVAL; in regmap_fields_force_write()
1766 return -EINVAL; in regmap_fields_update_bits()
1774 return -EINVAL; in regmap_fields_force_update_bits()
1780 return -EINVAL; in regmap_get_val_bytes()
1786 return -EINVAL; in regmap_get_max_register()
1792 return -EINVAL; in regmap_get_reg_stride()
1798 return -EINVAL; in regcache_sync()
1805 return -EINVAL; in regcache_sync_region()
1812 return -EINVAL; in regcache_drop_region()
1840 return -EINVAL; in regmap_register_patch()
1847 return -EINVAL; in regmap_parse_val()