Lines Matching +full:pci +full:- +full:domain
1 /* SPDX-License-Identifier: GPL-2.0 */
29 * msi_msg - Representation of a MSI message
72 * platform_msi_desc - Platform device specific msi descriptor data
82 * fsl_mc_msi_desc - FSL-MC device specific msi descriptor data
90 * ti_sci_inta_msi_desc - TISCI based INTA specific msi descriptor data
98 * struct msi_desc - Descriptor structure for MSI based interrupts
110 * @msi_mask: [PCI MSI] MSI cached mask bits
111 * @msix_ctrl: [PCI MSI-X] MSI-X cached per vector control bits
112 * @is_msix: [PCI MSI/X] True if MSI-X
113 * @multiple: [PCI MSI/X] log2 num of messages allocated
114 * @multi_cap: [PCI MSI/X] log2 num of messages supported
115 * @maskbit: [PCI MSI/X] Mask-Pending bit supported?
116 * @is_64: [PCI MSI/X] Address size: 0=32bit 1=64bit
117 * @entry_nr: [PCI MSI/X] Entry which is described by this descriptor
118 * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
119 * @mask_pos: [PCI MSI] Mask register position
120 * @mask_base: [PCI MSI-X] Mask register base address
122 * @fsl_mc: [fsl-mc] FSL MC device specific msi descriptor data
141 /* PCI MSI/X specific data */
164 * Non PCI variants add their data structure here. New
166 * proper name spaces for this. The PCI part is
177 #define msi_desc_to_dev(desc) ((desc)->dev)
178 #define dev_to_msi_list(dev) (&(dev)->msi_list)
187 if ((desc)->irq) \
188 for (__irq = (desc)->irq; \
189 __irq < ((desc)->irq + (desc)->nvec_used); \
195 return desc->iommu_cookie; in msi_desc_get_iommu_cookie()
201 desc->iommu_cookie = iommu_cookie; in msi_desc_set_iommu_cookie()
216 #define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev)
218 for_each_msi_entry((desc), &(pdev)->dev)
263 return -ENODEV; in arch_setup_msi_irqs()
274 * for fully irq domain based setups. Courtesy to XEN/X86.
291 * struct msi_domain_ops - MSI interrupt domain callbacks
293 * @msi_init: Domain specific init function for MSI interrupts
294 * @msi_free: Domain specific function to free a MSI interrupts
295 * @msi_check: Callback for verification of the domain/info/dev data
296 * @msi_prepare: Prepare the allocation of the interrupts in the domain
331 int (*msi_init)(struct irq_domain *domain,
335 void (*msi_free)(struct irq_domain *domain,
338 int (*msi_check)(struct irq_domain *domain,
341 int (*msi_prepare)(struct irq_domain *domain,
347 int (*handle_error)(struct irq_domain *domain,
349 int (*domain_alloc_irqs)(struct irq_domain *domain,
351 void (*domain_free_irqs)(struct irq_domain *domain,
356 * struct msi_domain_info - MSI interrupt domain data
364 * @data: Optional: domain specific data
380 * Init non implemented ops callbacks with default MSI domain
389 /* Support multiple PCI MSI interrupts */
391 /* Support PCI MSIX interrupts */
393 /* Needs early activate, required for PCI */
400 /* Is level-triggered capable, using two messages */
410 int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
412 int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
414 void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
415 void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
416 struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);
425 /* When an MSI domain is used as an intermediate domain */
426 int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
428 int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
443 int platform_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
445 void platform_msi_domain_free(struct irq_domain *domain, unsigned int virq,
447 void *platform_msi_get_host_data(struct irq_domain *domain);
455 int pci_msi_domain_check_cap(struct irq_domain *domain,
457 u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);