Lines Matching +full:0 +full:x39

25 #define RK808_DCDC1	0 /* (0+RK808_START) */
46 #define RK808_SECONDS_REG 0x00
47 #define RK808_MINUTES_REG 0x01
48 #define RK808_HOURS_REG 0x02
49 #define RK808_DAYS_REG 0x03
50 #define RK808_MONTHS_REG 0x04
51 #define RK808_YEARS_REG 0x05
52 #define RK808_WEEKS_REG 0x06
53 #define RK808_ALARM_SECONDS_REG 0x08
54 #define RK808_ALARM_MINUTES_REG 0x09
55 #define RK808_ALARM_HOURS_REG 0x0a
56 #define RK808_ALARM_DAYS_REG 0x0b
57 #define RK808_ALARM_MONTHS_REG 0x0c
58 #define RK808_ALARM_YEARS_REG 0x0d
59 #define RK808_RTC_CTRL_REG 0x10
60 #define RK808_RTC_STATUS_REG 0x11
61 #define RK808_RTC_INT_REG 0x12
62 #define RK808_RTC_COMP_LSB_REG 0x13
63 #define RK808_RTC_COMP_MSB_REG 0x14
64 #define RK808_ID_MSB 0x17
65 #define RK808_ID_LSB 0x18
66 #define RK808_CLK32OUT_REG 0x20
67 #define RK808_VB_MON_REG 0x21
68 #define RK808_THERMAL_REG 0x22
69 #define RK808_DCDC_EN_REG 0x23
70 #define RK808_LDO_EN_REG 0x24
71 #define RK808_SLEEP_SET_OFF_REG1 0x25
72 #define RK808_SLEEP_SET_OFF_REG2 0x26
73 #define RK808_DCDC_UV_STS_REG 0x27
74 #define RK808_DCDC_UV_ACT_REG 0x28
75 #define RK808_LDO_UV_STS_REG 0x29
76 #define RK808_LDO_UV_ACT_REG 0x2a
77 #define RK808_DCDC_PG_REG 0x2b
78 #define RK808_LDO_PG_REG 0x2c
79 #define RK808_VOUT_MON_TDB_REG 0x2d
80 #define RK808_BUCK1_CONFIG_REG 0x2e
81 #define RK808_BUCK1_ON_VSEL_REG 0x2f
82 #define RK808_BUCK1_SLP_VSEL_REG 0x30
83 #define RK808_BUCK1_DVS_VSEL_REG 0x31
84 #define RK808_BUCK2_CONFIG_REG 0x32
85 #define RK808_BUCK2_ON_VSEL_REG 0x33
86 #define RK808_BUCK2_SLP_VSEL_REG 0x34
87 #define RK808_BUCK2_DVS_VSEL_REG 0x35
88 #define RK808_BUCK3_CONFIG_REG 0x36
89 #define RK808_BUCK4_CONFIG_REG 0x37
90 #define RK808_BUCK4_ON_VSEL_REG 0x38
91 #define RK808_BUCK4_SLP_VSEL_REG 0x39
92 #define RK808_BOOST_CONFIG_REG 0x3a
93 #define RK808_LDO1_ON_VSEL_REG 0x3b
94 #define RK808_LDO1_SLP_VSEL_REG 0x3c
95 #define RK808_LDO2_ON_VSEL_REG 0x3d
96 #define RK808_LDO2_SLP_VSEL_REG 0x3e
97 #define RK808_LDO3_ON_VSEL_REG 0x3f
98 #define RK808_LDO3_SLP_VSEL_REG 0x40
99 #define RK808_LDO4_ON_VSEL_REG 0x41
100 #define RK808_LDO4_SLP_VSEL_REG 0x42
101 #define RK808_LDO5_ON_VSEL_REG 0x43
102 #define RK808_LDO5_SLP_VSEL_REG 0x44
103 #define RK808_LDO6_ON_VSEL_REG 0x45
104 #define RK808_LDO6_SLP_VSEL_REG 0x46
105 #define RK808_LDO7_ON_VSEL_REG 0x47
106 #define RK808_LDO7_SLP_VSEL_REG 0x48
107 #define RK808_LDO8_ON_VSEL_REG 0x49
108 #define RK808_LDO8_SLP_VSEL_REG 0x4a
109 #define RK808_DEVCTRL_REG 0x4b
110 #define RK808_INT_STS_REG1 0x4c
111 #define RK808_INT_STS_MSK_REG1 0x4d
112 #define RK808_INT_STS_REG2 0x4e
113 #define RK808_INT_STS_MSK_REG2 0x4f
114 #define RK808_IO_POL_REG 0x50
117 #define RK818_DCDC1 0
141 #define RK818_DCDC_EN_REG 0x23
142 #define RK818_LDO_EN_REG 0x24
143 #define RK818_SLEEP_SET_OFF_REG1 0x25
144 #define RK818_SLEEP_SET_OFF_REG2 0x26
145 #define RK818_DCDC_UV_STS_REG 0x27
146 #define RK818_DCDC_UV_ACT_REG 0x28
147 #define RK818_LDO_UV_STS_REG 0x29
148 #define RK818_LDO_UV_ACT_REG 0x2a
149 #define RK818_DCDC_PG_REG 0x2b
150 #define RK818_LDO_PG_REG 0x2c
151 #define RK818_VOUT_MON_TDB_REG 0x2d
152 #define RK818_BUCK1_CONFIG_REG 0x2e
153 #define RK818_BUCK1_ON_VSEL_REG 0x2f
154 #define RK818_BUCK1_SLP_VSEL_REG 0x30
155 #define RK818_BUCK2_CONFIG_REG 0x32
156 #define RK818_BUCK2_ON_VSEL_REG 0x33
157 #define RK818_BUCK2_SLP_VSEL_REG 0x34
158 #define RK818_BUCK3_CONFIG_REG 0x36
159 #define RK818_BUCK4_CONFIG_REG 0x37
160 #define RK818_BUCK4_ON_VSEL_REG 0x38
161 #define RK818_BUCK4_SLP_VSEL_REG 0x39
162 #define RK818_BOOST_CONFIG_REG 0x3a
163 #define RK818_LDO1_ON_VSEL_REG 0x3b
164 #define RK818_LDO1_SLP_VSEL_REG 0x3c
165 #define RK818_LDO2_ON_VSEL_REG 0x3d
166 #define RK818_LDO2_SLP_VSEL_REG 0x3e
167 #define RK818_LDO3_ON_VSEL_REG 0x3f
168 #define RK818_LDO3_SLP_VSEL_REG 0x40
169 #define RK818_LDO4_ON_VSEL_REG 0x41
170 #define RK818_LDO4_SLP_VSEL_REG 0x42
171 #define RK818_LDO5_ON_VSEL_REG 0x43
172 #define RK818_LDO5_SLP_VSEL_REG 0x44
173 #define RK818_LDO6_ON_VSEL_REG 0x45
174 #define RK818_LDO6_SLP_VSEL_REG 0x46
175 #define RK818_LDO7_ON_VSEL_REG 0x47
176 #define RK818_LDO7_SLP_VSEL_REG 0x48
177 #define RK818_LDO8_ON_VSEL_REG 0x49
178 #define RK818_LDO8_SLP_VSEL_REG 0x4a
179 #define RK818_BOOST_LDO9_ON_VSEL_REG 0x54
180 #define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55
181 #define RK818_DEVCTRL_REG 0x4b
182 #define RK818_INT_STS_REG1 0X4c
183 #define RK818_INT_STS_MSK_REG1 0x4d
184 #define RK818_INT_STS_REG2 0x4e
185 #define RK818_INT_STS_MSK_REG2 0x4f
186 #define RK818_IO_POL_REG 0x50
187 #define RK818_H5V_EN_REG 0x52
188 #define RK818_SLEEP_SET_OFF_REG3 0x53
189 #define RK818_BOOST_LDO9_ON_VSEL_REG 0x54
190 #define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55
191 #define RK818_BOOST_CTRL_REG 0x56
192 #define RK818_DCDC_ILMAX 0x90
193 #define RK818_USB_CTRL_REG 0xa1
195 #define RK818_H5V_EN BIT(0)
197 #define RK818_USB_ILIM_SEL_MASK 0xf
198 #define RK818_USB_ILMIN_2000MA 0x7
199 #define RK818_USB_CHG_SD_VSEL_MASK 0x70
213 #define RK805_VB_MON_REG 0x21
214 #define RK805_THERMAL_REG 0x22
217 #define RK805_DCDC_EN_REG 0x23
218 #define RK805_SLP_DCDC_EN_REG 0x25
219 #define RK805_SLP_LDO_EN_REG 0x26
220 #define RK805_LDO_EN_REG 0x27
223 #define RK805_BUCK_LDO_SLP_LP_EN_REG 0x2A
224 #define RK805_BUCK1_CONFIG_REG 0x2E
225 #define RK805_BUCK1_ON_VSEL_REG 0x2F
226 #define RK805_BUCK1_SLP_VSEL_REG 0x30
227 #define RK805_BUCK2_CONFIG_REG 0x32
228 #define RK805_BUCK2_ON_VSEL_REG 0x33
229 #define RK805_BUCK2_SLP_VSEL_REG 0x34
230 #define RK805_BUCK3_CONFIG_REG 0x36
231 #define RK805_BUCK4_CONFIG_REG 0x37
232 #define RK805_BUCK4_ON_VSEL_REG 0x38
233 #define RK805_BUCK4_SLP_VSEL_REG 0x39
234 #define RK805_LDO1_ON_VSEL_REG 0x3B
235 #define RK805_LDO1_SLP_VSEL_REG 0x3C
236 #define RK805_LDO2_ON_VSEL_REG 0x3D
237 #define RK805_LDO2_SLP_VSEL_REG 0x3E
238 #define RK805_LDO3_ON_VSEL_REG 0x3F
239 #define RK805_LDO3_SLP_VSEL_REG 0x40
242 #define RK805_PWRON_LP_INT_TIME_REG 0x47
243 #define RK805_PWRON_DB_REG 0x48
244 #define RK805_DEV_CTRL_REG 0x4B
245 #define RK805_INT_STS_REG 0x4C
246 #define RK805_INT_STS_MSK_REG 0x4D
247 #define RK805_GPIO_IO_POL_REG 0x50
248 #define RK805_OUT_REG 0x52
249 #define RK805_ON_SOURCE_REG 0xAE
250 #define RK805_OFF_SOURCE_REG 0xAF
254 #define RK805_PWRON_FALL_RISE_INT_EN 0x0
255 #define RK805_PWRON_FALL_RISE_INT_MSK 0x81
258 #define RK805_IRQ_PWRON_RISE 0
267 #define RK805_IRQ_PWRON_RISE_MSK BIT(0)
276 #define RK805_PWR_RISE_INT_STATUS BIT(0)
293 #define RK808_IRQ_VOUT_LO 0
304 #define RK808_IRQ_VOUT_LO_MSK BIT(0)
311 #define RK808_IRQ_PLUG_IN_INT_MSK BIT(0)
315 #define RK818_IRQ_VOUT_LO 0
332 #define RK818_IRQ_VOUT_LO_MSK BIT(0)
340 #define RK818_IRQ_PLUG_IN_MSK BIT(0)
351 #define RK808_VBAT_LOW_2V8 0x00
352 #define RK808_VBAT_LOW_2V9 0x01
353 #define RK808_VBAT_LOW_3V0 0x02
354 #define RK808_VBAT_LOW_3V1 0x03
355 #define RK808_VBAT_LOW_3V2 0x04
356 #define RK808_VBAT_LOW_3V3 0x05
357 #define RK808_VBAT_LOW_3V4 0x06
358 #define RK808_VBAT_LOW_3V5 0x07
359 #define VBAT_LOW_VOL_MASK (0x07 << 0)
360 #define EN_VABT_LOW_SHUT_DOWN (0x00 << 4)
361 #define EN_VBAT_LOW_IRQ (0x1 << 4)
362 #define VBAT_LOW_ACT_MASK (0x1 << 4)
364 #define BUCK_ILMIN_MASK (7 << 0)
365 #define BOOST_ILMIN_MASK (7 << 0)
368 #define MASK_ALL 0xff
370 #define BUCK_UV_ACT_MASK 0x0f
371 #define BUCK_UV_ACT_DISABLE 0
376 #define DEV_OFF BIT(0)
377 #define RTC_STOP BIT(0)
380 #define VB_LO_SEL_3500MV (7 << 0)
382 #define VOUT_LO_INT BIT(0)
383 #define CLK32KOUT2_EN BIT(0)
385 #define TEMP115C 0x0c
386 #define TEMP_HOTDIE_MSK 0x0c
387 #define SLP_SD_MSK (0x3 << 2)
388 #define SHUTDOWN_FUN (0x2 << 2)
389 #define SLEEP_FUN (0x1 << 2)
390 #define RK8XX_ID_MSK 0xfff0
393 #define AUTO_PWM_MODE 0
396 RK817_ID_DCDC1 = 0,
421 #define RK817_SECONDS_REG 0x00
422 #define RK817_MINUTES_REG 0x01
423 #define RK817_HOURS_REG 0x02
424 #define RK817_DAYS_REG 0x03
425 #define RK817_MONTHS_REG 0x04
426 #define RK817_YEARS_REG 0x05
427 #define RK817_WEEKS_REG 0x06
428 #define RK817_ALARM_SECONDS_REG 0x07
429 #define RK817_ALARM_MINUTES_REG 0x08
430 #define RK817_ALARM_HOURS_REG 0x09
431 #define RK817_ALARM_DAYS_REG 0x0a
432 #define RK817_ALARM_MONTHS_REG 0x0b
433 #define RK817_ALARM_YEARS_REG 0x0c
434 #define RK817_RTC_CTRL_REG 0xd
435 #define RK817_RTC_STATUS_REG 0xe
436 #define RK817_RTC_INT_REG 0xf
437 #define RK817_RTC_COMP_LSB_REG 0x10
438 #define RK817_RTC_COMP_MSB_REG 0x11
441 #define RK817_CODEC_DTOP_VUCTL 0x12
442 #define RK817_CODEC_DTOP_VUCTIME 0x13
443 #define RK817_CODEC_DTOP_LPT_SRST 0x14
444 #define RK817_CODEC_DTOP_DIGEN_CLKE 0x15
445 #define RK817_CODEC_AREF_RTCFG0 0x16
446 #define RK817_CODEC_AREF_RTCFG1 0x17
447 #define RK817_CODEC_AADC_CFG0 0x18
448 #define RK817_CODEC_AADC_CFG1 0x19
449 #define RK817_CODEC_DADC_VOLL 0x1a
450 #define RK817_CODEC_DADC_VOLR 0x1b
451 #define RK817_CODEC_DADC_SR_ACL0 0x1e
452 #define RK817_CODEC_DADC_ALC1 0x1f
453 #define RK817_CODEC_DADC_ALC2 0x20
454 #define RK817_CODEC_DADC_NG 0x21
455 #define RK817_CODEC_DADC_HPF 0x22
456 #define RK817_CODEC_DADC_RVOLL 0x23
457 #define RK817_CODEC_DADC_RVOLR 0x24
458 #define RK817_CODEC_AMIC_CFG0 0x27
459 #define RK817_CODEC_AMIC_CFG1 0x28
460 #define RK817_CODEC_DMIC_PGA_GAIN 0x29
461 #define RK817_CODEC_DMIC_LMT1 0x2a
462 #define RK817_CODEC_DMIC_LMT2 0x2b
463 #define RK817_CODEC_DMIC_NG1 0x2c
464 #define RK817_CODEC_DMIC_NG2 0x2d
465 #define RK817_CODEC_ADAC_CFG0 0x2e
466 #define RK817_CODEC_ADAC_CFG1 0x2f
467 #define RK817_CODEC_DDAC_POPD_DACST 0x30
468 #define RK817_CODEC_DDAC_VOLL 0x31
469 #define RK817_CODEC_DDAC_VOLR 0x32
470 #define RK817_CODEC_DDAC_SR_LMT0 0x35
471 #define RK817_CODEC_DDAC_LMT1 0x36
472 #define RK817_CODEC_DDAC_LMT2 0x37
473 #define RK817_CODEC_DDAC_MUTE_MIXCTL 0x38
474 #define RK817_CODEC_DDAC_RVOLL 0x39
475 #define RK817_CODEC_DDAC_RVOLR 0x3a
476 #define RK817_CODEC_AHP_ANTI0 0x3b
477 #define RK817_CODEC_AHP_ANTI1 0x3c
478 #define RK817_CODEC_AHP_CFG0 0x3d
479 #define RK817_CODEC_AHP_CFG1 0x3e
480 #define RK817_CODEC_AHP_CP 0x3f
481 #define RK817_CODEC_ACLASSD_CFG1 0x40
482 #define RK817_CODEC_ACLASSD_CFG2 0x41
483 #define RK817_CODEC_APLL_CFG0 0x42
484 #define RK817_CODEC_APLL_CFG1 0x43
485 #define RK817_CODEC_APLL_CFG2 0x44
486 #define RK817_CODEC_APLL_CFG3 0x45
487 #define RK817_CODEC_APLL_CFG4 0x46
488 #define RK817_CODEC_APLL_CFG5 0x47
489 #define RK817_CODEC_DI2S_CKM 0x48
490 #define RK817_CODEC_DI2S_RSD 0x49
491 #define RK817_CODEC_DI2S_RXCR1 0x4a
492 #define RK817_CODEC_DI2S_RXCR2 0x4b
493 #define RK817_CODEC_DI2S_RXCMD_TSD 0x4c
494 #define RK817_CODEC_DI2S_TXCR1 0x4d
495 #define RK817_CODEC_DI2S_TXCR2 0x4e
496 #define RK817_CODEC_DI2S_TXCR3_TXCMD 0x4f
499 #define RK817_I2S_MODE_MASK (0x1 << 0)
500 #define RK817_I2S_MODE_MST (0x1 << 0)
501 #define RK817_I2S_MODE_SLV (0x0 << 0)
504 #define DACMT_MASK (0x1 << 0)
505 #define DACMT_ENABLE (0x1 << 0)
506 #define DACMT_DISABLE (0x0 << 0)
509 #define VDW_RX_24BITS (0x17)
510 #define VDW_RX_16BITS (0x0f)
513 #define VDW_TX_24BITS (0x17)
514 #define VDW_TX_16BITS (0x0f)
517 #define MIC_DIFF_MASK (0x1 << 7)
518 #define MIC_DIFF_DIS (0x0 << 7)
519 #define MIC_DIFF_EN (0x1 << 7)
521 #define RK817_POWER_EN_REG(i) (0xb1 + (i))
522 #define RK817_POWER_SLP_EN_REG(i) (0xb5 + (i))
524 #define RK817_POWER_CONFIG (0xb9)
526 #define RK817_BUCK_CONFIG_REG(i) (0xba + (i) * 3)
528 #define RK817_BUCK1_ON_VSEL_REG 0xBB
529 #define RK817_BUCK1_SLP_VSEL_REG 0xBC
531 #define RK817_BUCK2_CONFIG_REG 0xBD
532 #define RK817_BUCK2_ON_VSEL_REG 0xBE
533 #define RK817_BUCK2_SLP_VSEL_REG 0xBF
535 #define RK817_BUCK3_CONFIG_REG 0xC0
536 #define RK817_BUCK3_ON_VSEL_REG 0xC1
537 #define RK817_BUCK3_SLP_VSEL_REG 0xC2
539 #define RK817_BUCK4_CONFIG_REG 0xC3
540 #define RK817_BUCK4_ON_VSEL_REG 0xC4
541 #define RK817_BUCK4_SLP_VSEL_REG 0xC5
543 #define RK817_LDO_ON_VSEL_REG(idx) (0xcc + (idx) * 2)
544 #define RK817_BOOST_OTG_CFG (0xde)
546 #define RK817_ID_MSB 0xed
547 #define RK817_ID_LSB 0xee
549 #define RK817_SYS_STS 0xf0
550 #define RK817_SYS_CFG(i) (0xf1 + (i))
552 #define RK817_ON_SOURCE_REG 0xf5
553 #define RK817_OFF_SOURCE_REG 0xf6
556 #define RK817_INT_STS_REG0 0xf8
557 #define RK817_INT_STS_MSK_REG0 0xf9
558 #define RK817_INT_STS_REG1 0xfa
559 #define RK817_INT_STS_MSK_REG1 0xfb
560 #define RK817_INT_STS_REG2 0xfc
561 #define RK817_INT_STS_MSK_REG2 0xfd
562 #define RK817_GPIO_INT_CFG 0xfe
565 #define RK817_IRQ_PWRON_FALL 0
592 * rtc_ctrl 0xd
597 /* power config 0xb9 */
600 #define RK817_BUCK3_FB_RES_EXT 0
602 /* buck config 0xba */
604 #define RK817_RAMP_RATE_MASK (0x3 << RK817_RAMP_RATE_OFFSET)
605 #define RK817_RAMP_RATE_3MV_PER_US (0x0 << RK817_RAMP_RATE_OFFSET)
606 #define RK817_RAMP_RATE_6_3MV_PER_US (0x1 << RK817_RAMP_RATE_OFFSET)
607 #define RK817_RAMP_RATE_12_5MV_PER_US (0x2 << RK817_RAMP_RATE_OFFSET)
608 #define RK817_RAMP_RATE_25MV_PER_US (0x3 << RK817_RAMP_RATE_OFFSET)
610 /* sys_cfg1 0xf2 */
611 #define RK817_HOTDIE_TEMP_MSK (0x3 << 4)
612 #define RK817_HOTDIE_85 (0x0 << 4)
613 #define RK817_HOTDIE_95 (0x1 << 4)
614 #define RK817_HOTDIE_105 (0x2 << 4)
615 #define RK817_HOTDIE_115 (0x3 << 4)
618 #define RK817_TSD_140 0
623 /* sys_cfg3 0xf4 */
624 #define RK817_SLPPIN_FUNC_MSK (0x3 << 3)
625 #define SLPPIN_NULL_FUN (0x0 << 3)
626 #define SLPPIN_SLP_FUN (0x1 << 3)
627 #define SLPPIN_DN_FUN (0x2 << 3)
628 #define SLPPIN_RST_FUN (0x3 << 3)
630 #define RK817_RST_FUNC_MSK (0x3 << 6)
633 #define RK817_RST_FUNC_DEV (0) /* reset the dev */
634 #define RK817_RST_FUNC_REG (0x1 << 6) /* reset the reg only */
638 #define RK817_SLPPOL_L (0)
640 /* gpio&int 0xfe */
643 #define RK817_INT_POL_L 0
690 RK805_ID = 0x8050,
691 RK808_ID = 0x0000,
692 RK809_ID = 0x8090,
693 RK817_ID = 0x8170,
694 RK818_ID = 0x8180,