361 struct gpio_chip {  struct
367 	int			(*request)(struct gpio_chip *gc,  argument
369 	void			(*free)(struct gpio_chip *gc,  argument
371 	int			(*get_direction)(struct gpio_chip *gc,  argument
373 	int			(*direction_input)(struct gpio_chip *gc,  argument
375 	int			(*direction_output)(struct gpio_chip *gc,  argument
377 	int			(*get)(struct gpio_chip *gc,  argument
379 	int			(*get_multiple)(struct gpio_chip *gc,  argument
382 	void			(*set)(struct gpio_chip *gc,  argument
384 	void			(*set_multiple)(struct gpio_chip *gc,  argument
387 	int			(*set_config)(struct gpio_chip *gc,  argument
390 	int			(*to_irq)(struct gpio_chip *gc,  argument
394 						struct gpio_chip *gc);  argument
396 	int			(*init_valid_mask)(struct gpio_chip *gc,  argument
400 	int			(*add_pin_ranges)(struct gpio_chip *gc);  argument
402 	int			base;
403 	u16			ngpio;
404 	u16			offset;
405 	const char		*const *names;
406 	bool			can_sleep;
409 	unsigned long (*read_reg)(void __iomem *reg);
410 	void (*write_reg)(void __iomem *reg, unsigned long data);
411 	bool be_bits;
412 	void __iomem *reg_dat;
413 	void __iomem *reg_set;
414 	void __iomem *reg_clr;
415 	void __iomem *reg_dir_out;
416 	void __iomem *reg_dir_in;
417 	bool bgpio_dir_unreadable;
418 	int bgpio_bits;
419 	spinlock_t bgpio_lock;
420 	unsigned long bgpio_data;
421 	unsigned long bgpio_dir;
436 	struct gpio_irq_chip irq;
445 	unsigned long *valid_mask;
473 	int (*of_xlate)(struct gpio_chip *gc,  argument